xtensa: disable MMU initialization option on MMUv2 cores
[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / clock / st / st,clkgen-divmux.txt
1 Binding for a ST divider and multiplexer clock driver.
2
3 This binding uses the common clock binding[1].
4 Base address is located to the parent node. See clock binding[2]
5
6 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
7 [2] Documentation/devicetree/bindings/clock/st/st,clkgen.txt
8
9 Required properties:
10
11 - compatible : shall be:
12         "st,clkgena-divmux-c65-hs",     "st,clkgena-divmux"
13         "st,clkgena-divmux-c65-ls",     "st,clkgena-divmux"
14         "st,clkgena-divmux-c32-odf0",   "st,clkgena-divmux"
15         "st,clkgena-divmux-c32-odf1",   "st,clkgena-divmux"
16         "st,clkgena-divmux-c32-odf2",   "st,clkgena-divmux"
17         "st,clkgena-divmux-c32-odf3",   "st,clkgena-divmux"
18
19 - #clock-cells : From common clock binding; shall be set to 1.
20
21 - clocks : From common clock binding
22
23 - clock-output-names : From common clock binding.
24
25 Example:
26
27         clockgen-a@fd345000 {
28                 reg = <0xfd345000 0xb50>;
29
30                 clk_m_a1_div1: clk-m-a1-div1 {
31                         #clock-cells = <1>;
32                         compatible = "st,clkgena-divmux-c32-odf1",
33                                      "st,clkgena-divmux";
34
35                         clocks = <&clk_m_a1_osc_prediv>,
36                                  <&clk_m_a1_pll0 1>, /* PLL0 PHI1 */
37                                  <&clk_m_a1_pll1 1>; /* PLL1 PHI1 */
38
39                         clock-output-names = "clk-m-rx-icn-ts",
40                                              "clk-m-rx-icn-vdp-0",
41                                              "", /* unused */
42                                              "clk-m-prv-t1-bus",
43                                              "clk-m-icn-reg-12",
44                                              "clk-m-icn-reg-10",
45                                              "", /* unused */
46                                              "clk-m-icn-st231";
47                 };
48         };
49