Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt

   1 NVIDIA Tegra Power Management Controller (PMC)
   2
   3 Required properties:
   4 - compatible: Should contain one of the following:
   5   - "nvidia,tegra186-pmc": for Tegra186
   6   - "nvidia,tegra194-pmc": for Tegra194
   7 - reg: Must contain an (offset, length) pair of the register set for each
   8   entry in reg-names.
   9 - reg-names: Must include the following entries:
  10   - "pmc"
  11   - "wake"
  12   - "aotag"
  13   - "scratch"
  14   - "misc" (Only for Tegra194)
  15
  16 Optional properties:
  17 - nvidia,invert-interrupt: If present, inverts the PMU interrupt signal.
  18
  19 Example:
  20
  21 SoC DTSI:
  22
  23         pmc@c3600000 {
  24                 compatible = "nvidia,tegra186-pmc";
  25                 reg = <0 0x0c360000 0 0x10000>,
  26                       <0 0x0c370000 0 0x10000>,
  27                       <0 0x0c380000 0 0x10000>,
  28                       <0 0x0c390000 0 0x10000>;
  29                 reg-names = "pmc", "wake", "aotag", "scratch";
  30         };
  31
  32 Board DTS:
  33
  34         pmc@c360000 {
  35                 nvidia,invert-interrupt;
  36         };
  37
  38 == Pad Control ==
  39
  40 On Tegra SoCs a pad is a set of pins which are configured as a group.
  41 The pin grouping is a fixed attribute of the hardware. The PMC can be
  42 used to set pad power state and signaling voltage. A pad can be either
  43 in active or power down mode. The support for power state and signaling
  44 voltage configuration varies depending on the pad in question. 3.3 V and
  45 1.8 V signaling voltages are supported on pins where software
  46 controllable signaling voltage switching is available.
  47
  48 Pad configurations are described with pin configuration nodes which
  49 are placed under the pmc node and they are referred to by the pinctrl
  50 client properties. For more information see
  51 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
  52
  53 The following pads are present on Tegra186:
  54 csia            csib            dsi             mipi-bias
  55 pex-clk-bias    pex-clk3        pex-clk2        pex-clk1
  56 usb0            usb1            usb2            usb-bias
  57 uart            audio           hsic            dbg
  58 hdmi-dp0        hdmi-dp1        pex-cntrl       sdmmc2-hv
  59 sdmmc4          cam             dsib            dsic
  60 dsid            csic            csid            csie
  61 dsif            spi             ufs             dmic-hv
  62 edp             sdmmc1-hv       sdmmc3-hv       conn
  63 audio-hv        ao-hv
  64
  65 Required pin configuration properties:
  66   - pins: A list of strings, each of which contains the name of a pad
  67           to be configured.
  68
  69 Optional pin configuration properties:
  70   - low-power-enable: Configure the pad into power down mode
  71   - low-power-disable: Configure the pad into active mode
  72   - power-source: Must contain either TEGRA_IO_PAD_VOLTAGE_1V8 or
  73     TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages.
  74     The values are defined in
  75     include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.
  76
  77 Note: The power state can be configured on all of the above pads except
  78       for ao-hv. Following pads have software configurable signaling
  79       voltages: sdmmc2-hv, dmic-hv, sdmmc1-hv, sdmmc3-hv, audio-hv,
  80       ao-hv.
  81
  82 Pad configuration state example:
  83         pmc: pmc@7000e400 {
  84                 compatible = "nvidia,tegra186-pmc";
  85                 reg = <0 0x0c360000 0 0x10000>,
  86                       <0 0x0c370000 0 0x10000>,
  87                       <0 0x0c380000 0 0x10000>,
  88                       <0 0x0c390000 0 0x10000>;
  89                 reg-names = "pmc", "wake", "aotag", "scratch";
  90
  91                 ...
  92
  93                 sdmmc1_3v3: sdmmc1-3v3 {
  94                         pins = "sdmmc1-hv";
  95                         power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
  96                 };
  97
  98                 sdmmc1_1v8: sdmmc1-1v8 {
  99                         pins = "sdmmc1-hv";
 100                         power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
 101                 };
 102
 103                 hdmi_off: hdmi-off {
 104                         pins = "hdmi";
 105                         low-power-enable;
 106                 }
 107
 108                 hdmi_on: hdmi-on {
 109                         pins = "hdmi";
 110                         low-power-disable;
 111                 }
 112         };
 113
 114 Pinctrl client example:
 115         sdmmc1: sdhci@3400000 {
 116                 ...
 117                 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
 118                 pinctrl-0 = <&sdmmc1_3v3>;
 119                 pinctrl-1 = <&sdmmc1_1v8>;
 120         };
 121
 122         ...
 123
 124         sor0: sor@15540000 {
 125                 ...
 126                 pinctrl-0 = <&hdmi_off>;
 127                 pinctrl-1 = <&hdmi_on>;
 128                 pinctrl-names = "hdmi-on", "hdmi-off";
 129         };