Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt

   1 NVIDIA Tegra Power Management Controller (PMC)
   2
   3 Required properties:
   4 - compatible: Should contain one of the following:
   5   - "nvidia,tegra186-pmc": for Tegra186
   6   - "nvidia,tegra194-pmc": for Tegra194
   7 - reg: Must contain an (offset, length) pair of the register set for each
   8   entry in reg-names.
   9 - reg-names: Must include the following entries:
  10   - "pmc"
  11   - "wake"
  12   - "aotag"
  13   - "scratch"
  14   - "misc" (Only for Tegra194)
  15
  16 Optional properties:
  17 - nvidia,invert-interrupt: If present, inverts the PMU interrupt signal.
  18 - interrupt-controller: Identifies the node as an interrupt controller.
  19 - #interrupt-cells: Specifies the number of cells needed to encode an
  20   interrupt source. The value must be 2.
  21
  22 Example:
  23
  24 SoC DTSI:
  25
  26         pmc@c3600000 {
  27                 compatible = "nvidia,tegra186-pmc";
  28                 reg = <0 0x0c360000 0 0x10000>,
  29                       <0 0x0c370000 0 0x10000>,
  30                       <0 0x0c380000 0 0x10000>,
  31                       <0 0x0c390000 0 0x10000>;
  32                 reg-names = "pmc", "wake", "aotag", "scratch";
  33         };
  34
  35 Board DTS:
  36
  37         pmc@c360000 {
  38                 nvidia,invert-interrupt;
  39         };
  40
  41 == Pad Control ==
  42
  43 On Tegra SoCs a pad is a set of pins which are configured as a group.
  44 The pin grouping is a fixed attribute of the hardware. The PMC can be
  45 used to set pad power state and signaling voltage. A pad can be either
  46 in active or power down mode. The support for power state and signaling
  47 voltage configuration varies depending on the pad in question. 3.3 V and
  48 1.8 V signaling voltages are supported on pins where software
  49 controllable signaling voltage switching is available.
  50
  51 Pad configurations are described with pin configuration nodes which
  52 are placed under the pmc node and they are referred to by the pinctrl
  53 client properties. For more information see
  54 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt.
  55
  56 The following pads are present on Tegra186:
  57 csia            csib            dsi             mipi-bias
  58 pex-clk-bias    pex-clk3        pex-clk2        pex-clk1
  59 usb0            usb1            usb2            usb-bias
  60 uart            audio           hsic            dbg
  61 hdmi-dp0        hdmi-dp1        pex-cntrl       sdmmc2-hv
  62 sdmmc4          cam             dsib            dsic
  63 dsid            csic            csid            csie
  64 dsif            spi             ufs             dmic-hv
  65 edp             sdmmc1-hv       sdmmc3-hv       conn
  66 audio-hv        ao-hv
  67
  68 Required pin configuration properties:
  69   - pins: A list of strings, each of which contains the name of a pad
  70           to be configured.
  71
  72 Optional pin configuration properties:
  73   - low-power-enable: Configure the pad into power down mode
  74   - low-power-disable: Configure the pad into active mode
  75   - power-source: Must contain either TEGRA_IO_PAD_VOLTAGE_1V8 or
  76     TEGRA_IO_PAD_VOLTAGE_3V3 to select between signaling voltages.
  77     The values are defined in
  78     include/dt-bindings/pinctrl/pinctrl-tegra-io-pad.h.
  79
  80 Note: The power state can be configured on all of the above pads except
  81       for ao-hv. Following pads have software configurable signaling
  82       voltages: sdmmc2-hv, dmic-hv, sdmmc1-hv, sdmmc3-hv, audio-hv,
  83       ao-hv.
  84
  85 Pad configuration state example:
  86         pmc: pmc@7000e400 {
  87                 compatible = "nvidia,tegra186-pmc";
  88                 reg = <0 0x0c360000 0 0x10000>,
  89                       <0 0x0c370000 0 0x10000>,
  90                       <0 0x0c380000 0 0x10000>,
  91                       <0 0x0c390000 0 0x10000>;
  92                 reg-names = "pmc", "wake", "aotag", "scratch";
  93
  94                 ...
  95
  96                 sdmmc1_3v3: sdmmc1-3v3 {
  97                         pins = "sdmmc1-hv";
  98                         power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
  99                 };
 100
 101                 sdmmc1_1v8: sdmmc1-1v8 {
 102                         pins = "sdmmc1-hv";
 103                         power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
 104                 };
 105
 106                 hdmi_off: hdmi-off {
 107                         pins = "hdmi";
 108                         low-power-enable;
 109                 }
 110
 111                 hdmi_on: hdmi-on {
 112                         pins = "hdmi";
 113                         low-power-disable;
 114                 }
 115         };
 116
 117 Pinctrl client example:
 118         sdmmc1: sdhci@3400000 {
 119                 ...
 120                 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
 121                 pinctrl-0 = <&sdmmc1_3v3>;
 122                 pinctrl-1 = <&sdmmc1_1v8>;
 123         };
 124
 125         ...
 126
 127         sor0: sor@15540000 {
 128                 ...
 129                 pinctrl-0 = <&hdmi_off>;
 130                 pinctrl-1 = <&hdmi_on>;
 131                 pinctrl-names = "hdmi-on", "hdmi-off";
 132         };