Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
[sfrench/cifs-2.6.git] / Documentation / devicetree / bindings / arm / mediatek / mediatek,infracfg.txt
1 Mediatek infracfg controller
2 ============================
3
4 The Mediatek infracfg controller provides various clocks and reset
5 outputs to the system.
6
7 Required Properties:
8
9 - compatible: Should be one of:
10         - "mediatek,mt2701-infracfg", "syscon"
11         - "mediatek,mt2712-infracfg", "syscon"
12         - "mediatek,mt6797-infracfg", "syscon"
13         - "mediatek,mt7622-infracfg", "syscon"
14         - "mediatek,mt7623-infracfg", "mediatek,mt2701-infracfg", "syscon"
15         - "mediatek,mt7629-infracfg", "syscon"
16         - "mediatek,mt8135-infracfg", "syscon"
17         - "mediatek,mt8173-infracfg", "syscon"
18         - "mediatek,mt8183-infracfg", "syscon"
19         - "mediatek,mt8516-infracfg", "syscon"
20 - #clock-cells: Must be 1
21 - #reset-cells: Must be 1
22
23 The infracfg controller uses the common clk binding from
24 Documentation/devicetree/bindings/clock/clock-bindings.txt
25 The available clocks are defined in dt-bindings/clock/mt*-clk.h.
26 Also it uses the common reset controller binding from
27 Documentation/devicetree/bindings/reset/reset.txt.
28 The available reset outputs are defined in
29 dt-bindings/reset/mt*-resets.h
30
31 Example:
32
33 infracfg: power-controller@10001000 {
34         compatible = "mediatek,mt8173-infracfg", "syscon";
35         reg = <0 0x10001000 0 0x1000>;
36         #clock-cells = <1>;
37         #reset-cells = <1>;
38 };