Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt

   1 Mediatek infracfg controller
   2 ============================
   3
   4 The Mediatek infracfg controller provides various clocks and reset
   5 outputs to the system.
   6
   7 Required Properties:
   8
   9 - compatible: Should be one of:
  10         - "mediatek,mt2701-infracfg", "syscon"
  11         - "mediatek,mt6797-infracfg", "syscon"
  12         - "mediatek,mt8135-infracfg", "syscon"
  13         - "mediatek,mt8173-infracfg", "syscon"
  14 - #clock-cells: Must be 1
  15 - #reset-cells: Must be 1
  16
  17 The infracfg controller uses the common clk binding from
  18 Documentation/devicetree/bindings/clock/clock-bindings.txt
  19 The available clocks are defined in dt-bindings/clock/mt*-clk.h.
  20 Also it uses the common reset controller binding from
  21 Documentation/devicetree/bindings/reset/reset.txt.
  22 The available reset outputs are defined in
  23 dt-bindings/reset/mt*-resets.h
  24
  25 Example:
  26
  27 infracfg: power-controller@10001000 {
  28         compatible = "mediatek,mt8173-infracfg", "syscon";
  29         reg = <0 0x10001000 0 0x1000>;
  30         #clock-cells = <1>;
  31         #reset-cells = <1>;
  32 };