Documentation/devicetree/bindings/arm/atmel-at91.txt

   1 Atmel AT91 device tree bindings.
   2 ================================
   3
   4 PIT Timer required properties:
   5 - compatible: Should be "atmel,at91sam9260-pit"
   6 - reg: Should contain registers location and length
   7 - interrupts: Should contain interrupt for the PIT which is the IRQ line
   8   shared across all System Controller members.
   9
  10 TC/TCLIB Timer required properties:
  11 - compatible: Should be "atmel,<chip>-pit".
  12   <chip> can be "at91rm9200" or "at91sam9x5"
  13 - reg: Should contain registers location and length
  14 - interrupts: Should contain all interrupts for the TC block
  15   Note that you can specify several interrupt cells if the TC
  16   block has one interrupt per channel.
  17
  18 Examples:
  19
  20 One interrupt per TC block:
  21         tcb0: timer@fff7c000 {
  22                 compatible = "atmel,at91rm9200-tcb";
  23                 reg = <0xfff7c000 0x100>;
  24                 interrupts = <18 4>;
  25         };
  26
  27 One interrupt per TC channel in a TC block:
  28         tcb1: timer@fffdc000 {
  29                 compatible = "atmel,at91rm9200-tcb";
  30                 reg = <0xfffdc000 0x100>;
  31                 interrupts = <26 4 27 4 28 4>;
  32         };
  33
  34 RSTC Reset Controller required properties:
  35 - compatible: Should be "atmel,<chip>-rstc".
  36   <chip> can be "at91sam9260" or "at91sam9g45"
  37 - reg: Should contain registers location and length
  38
  39 Example:
  40
  41         rstc@fffffd00 {
  42                 compatible = "atmel,at91sam9260-rstc";
  43                 reg = <0xfffffd00 0x10>;
  44         };
  45
  46 RAMC SDRAM/DDR Controller required properties:
  47 - compatible: Should be "atmel,at91sam9260-sdramc",
  48                         "atmel,at91sam9g45-ddramc",
  49 - reg: Should contain registers location and length
  50   For at91sam9263 and at91sam9g45 you must specify 2 entries.
  51
  52 Examples:
  53
  54         ramc0: ramc@ffffe800 {
  55                 compatible = "atmel,at91sam9g45-ddramc";
  56                 reg = <0xffffe800 0x200>;
  57         };
  58
  59         ramc0: ramc@ffffe400 {
  60                 compatible = "atmel,at91sam9g45-ddramc";
  61                 reg = <0xffffe400 0x200
  62                        0xffffe600 0x200>;
  63         };
  64
  65 SHDWC Shutdown Controller
  66
  67 required properties:
  68 - compatible: Should be "atmel,<chip>-shdwc".
  69   <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
  70 - reg: Should contain registers location and length
  71
  72 optional properties:
  73 - atmel,wakeup-mode: String, operation mode of the wakeup mode.
  74   Supported values are: "none", "high", "low", "any".
  75 - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
  76
  77 optional at91sam9260 properties:
  78 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
  79
  80 optional at91sam9rl properties:
  81 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
  82 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
  83
  84 optional at91sam9x5 properties:
  85 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
  86
  87 Example:
  88
  89         rstc@fffffd00 {
  90                 compatible = "atmel,at91sam9260-rstc";
  91                 reg = <0xfffffd00 0x10>;
  92         };