powerpc/85xx: Add new LAW & ECM device tree nodes for all 85xx systems
authorKumar Gala <galak@kernel.crashing.org>
Wed, 22 Apr 2009 18:17:42 +0000 (13:17 -0500)
committerKumar Gala <galak@kernel.crashing.org>
Tue, 19 May 2009 05:46:19 +0000 (00:46 -0500)
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
22 files changed:
arch/powerpc/boot/dts/ksi8560.dts
arch/powerpc/boot/dts/mpc8536ds.dts
arch/powerpc/boot/dts/mpc8540ads.dts
arch/powerpc/boot/dts/mpc8541cds.dts
arch/powerpc/boot/dts/mpc8544ds.dts
arch/powerpc/boot/dts/mpc8548cds.dts
arch/powerpc/boot/dts/mpc8555cds.dts
arch/powerpc/boot/dts/mpc8560ads.dts
arch/powerpc/boot/dts/mpc8568mds.dts
arch/powerpc/boot/dts/mpc8572ds.dts
arch/powerpc/boot/dts/mpc8572ds_36b.dts
arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
arch/powerpc/boot/dts/sbc8548.dts
arch/powerpc/boot/dts/sbc8560.dts
arch/powerpc/boot/dts/socrates.dts
arch/powerpc/boot/dts/stx_gp3_8560.dts
arch/powerpc/boot/dts/tqm8540.dts
arch/powerpc/boot/dts/tqm8541.dts
arch/powerpc/boot/dts/tqm8548-bigflash.dts
arch/powerpc/boot/dts/tqm8548.dts
arch/powerpc/boot/dts/tqm8555.dts
arch/powerpc/boot/dts/tqm8560.dts

index c9cfd374bffb327ce8be53dadcd48d39935be113..bdb7fc0fa3327c53e0ccfc8bf054a12684766a20 100644 (file)
                ranges = <0x00000000 0xfdf00000 0x00100000>;
                bus-frequency = <0>;                            /* Fixed by bootwrapper */
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <8>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8560-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,mpc8540-memory-controller";
                        reg = <0x2000 0x1000>;
index af8c64c4e75b2cbe6dc8dfc347ca0ecce9b46ecf..b6fd8564c0e37a9da47549bbfef3b10557f02545 100644 (file)
                reg = <0xffe00000 0x1000>;
                bus-frequency = <0>;            // Filled out by uboot.
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <12>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8536-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,mpc8536-memory-controller";
                        reg = <0x2000 0x1000>;
index de5535c948086c416b57d8d502ef94dae25aa736..7c8b1093b0b8af6775f246cc1ca05ceb90f24700 100644 (file)
                reg = <0xe0000000 0x100000>;    // CCSRBAR 1M
                bus-frequency = <0>;
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <8>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8540-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,8540-memory-controller";
                        reg = <0x2000 0x1000>;
index d10f5d670079c47af5db59884ab125558067ba2b..de9d8b55391b0eeabb79ed759030b3f28751d627 100644 (file)
                reg = <0xe0000000 0x1000>;      // CCSRBAR 1M
                bus-frequency = <0>;
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <8>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8541-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,8541-memory-controller";
                        reg = <0x2000 0x1000>;
index 3ae31d7d93eb9d6fa31afab6e2070fe436fdcd26..9819d6c2275ceac88faa2f4c4cc420061823de68 100644 (file)
                reg = <0xe0000000 0x1000>;      // CCSRBAR 1M
                bus-frequency = <0>;            // Filled out by uboot.
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <10>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8544-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,8544-memory-controller";
                        reg = <0x2000 0x1000>;
index 732c1110c18a8a37ff5a2eb1e35807db2df14e64..6e40db7e2b152325361eab83c1e652156890615d 100644 (file)
                reg = <0xe0000000 0x1000>;      // CCSRBAR
                bus-frequency = <0>;
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <10>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8548-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,8548-memory-controller";
                        reg = <0x2000 0x1000>;
index 7f9e5354245a8892e0d96ac2d68f96f417c9ce06..6291497721bae56aad16455d1c97ca8423d61b46 100644 (file)
                reg = <0xe0000000 0x1000>;      // CCSRBAR 1M
                bus-frequency = <0>;
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <8>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8555-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,8555-memory-controller";
                        reg = <0x2000 0x1000>;
index 190d46b66f3072cd900f96e5ca93db49d56051bf..a2347b57a2a2874b8318bb8233b490aaf2378e12 100644 (file)
                reg = <0xe0000000 0x200>;
                bus-frequency = <330000000>;
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <8>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8560-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,8540-memory-controller";
                        reg = <0x2000 0x1000>;
index 3330356427f88e16401f4bb3e1017c042144d6f9..d2fb639c26e79c284d0f1af7260561eb678e738b 100644 (file)
                reg = <0xe0000000 0x1000>;
                bus-frequency = <0>;
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <10>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8568-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,8568-memory-controller";
                        reg = <0x2000 0x1000>;
index 75fc30b07441dcba50c39ddc4751df2e4c6649e4..3f9a62313f296119ad3ec2f7becad530f8111c97 100644 (file)
                reg = <0 0xffe00000 0 0x1000>;  // CCSRBAR & soc regs, remove once parse code for immrbase fixed
                bus-frequency = <0>;            // Filled out by uboot.
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <12>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8572-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,mpc8572-memory-controller";
                        reg = <0x2000 0x1000>;
index e2a1f75aeeede55ad191972924059acfa60ee6e5..fee17f35f7a07761cb523456b9a067b8bdf7087e 100644 (file)
                reg = <0xf 0xffe00000 0 0x1000>;        // CCSRBAR & soc regs, remove once parse code for immrbase fixed
                bus-frequency = <0>;            // Filled out by uboot.
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <12>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8572-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,mpc8572-memory-controller";
                        reg = <0x2000 0x1000>;
index 45ca89e5533ae1e53c79e3d829a6d9f9ba93c3da..abb1730d15ad8b716d626da9da02d071eb8f328e 100644 (file)
                reg = <0xffe00000 0x1000>;      // CCSRBAR & soc regs, remove once parse code for immrbase fixed
                bus-frequency = <0>;            // Filled out by uboot.
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <12>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8572-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,mpc8572-memory-controller";
                        reg = <0x2000 0x1000>;
index 196fcc140541c4cd219c18ee7c8a7c30a6be7eac..66c9165eeb7a39930b3426a26847ed61a0acee58 100644 (file)
                bus-frequency = <0>;
                compatible = "simple-bus";
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <10>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8548-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,mpc8548-memory-controller";
                        reg = <0x2000 0x1000>;
index 813d7317d9d4acd0cb59b816fe94adbba2e1c987..ff6a52270a9b06847ea10430f6362453410cef75 100644 (file)
                reg = <0xff700000 0x00100000>;
                clock-frequency = <0>;
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <8>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8560-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,mpc8560-memory-controller";
                        reg = <0x2000 0x1000>;
index e8f4e461a1f132be5f177270e686304adafb3b8c..779876a8867eaa88bc91634663f65ebba029cbe0 100644 (file)
                bus-frequency = <0>;            // Filled in by U-Boot
                compatible = "fsl,mpc8544-immr", "simple-bus";
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <10>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8544-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,mpc8544-memory-controller";
                        reg = <0x2000 0x1000>;
index 8691dd3d1fc7e41528ddceb9f9c00484b27c0164..ce35e89a6655b98248a1e5385ae29929d383023e 100644 (file)
                bus-frequency = <0>;
                compatible = "fsl,mpc8560-immr", "simple-bus";
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <8>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8560-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,mpc8540-memory-controller";
                        reg = <0x2000 0x1000>;
index c8265b6c06a45966ace65305f7ea8f2afe0e6cdd..5e9eecc33a410158c7ba528fc51548fc341281aa 100644 (file)
                bus-frequency = <0>;
                compatible = "fsl,mpc8540-immr", "simple-bus";
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <8>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8540-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,mpc8540-memory-controller";
                        reg = <0x2000 0x1000>;
index 9080546b40b3f3e4adb9d49340ff050cfb477635..3c8d5c1000d6a1372b6a2e8ac91bce3fcc2963c4 100644 (file)
                bus-frequency = <0>;
                compatible = "fsl,mpc8541-immr", "simple-bus";
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <8>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8541-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,mpc8540-memory-controller";
                        reg = <0x2000 0x1000>;
index 1139eb5daf95875cff66f4bf14abdb50551c99dc..435d2b240eb9a31845f348204d150b2aa4e2f5bd 100644 (file)
                bus-frequency = <0>;
                compatible = "fsl,mpc8548-immr", "simple-bus";
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <10>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8548-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,mpc8548-memory-controller";
                        reg = <0x2000 0x1000>;
index d337d830b6acf22e9f45d4cc60c81265933e75ab..3b8af5bd6adfb057fb82a53cd42c474fad092bed 100644 (file)
                bus-frequency = <0>;
                compatible = "fsl,mpc8548-immr", "simple-bus";
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <10>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8548-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,mpc8548-memory-controller";
                        reg = <0x2000 0x1000>;
index 021039b30e464fcd7c46de2bb10aa1beab31df22..a820bbeb2f7d5739544ecedce2175c983e9648cd 100644 (file)
                bus-frequency = <0>;
                compatible = "fsl,mpc8555-immr", "simple-bus";
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <8>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8555-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,mpc8540-memory-controller";
                        reg = <0x2000 0x1000>;
index cec84c264fa88a55ba4b6ee5ce37d79a3cbad2ad..fa73550625251f335b48b09a6ed784b10a7633f6 100644 (file)
                bus-frequency = <0>;
                compatible = "fsl,mpc8560-immr", "simple-bus";
 
+               ecm-law@0 {
+                       compatible = "fsl,ecm-law";
+                       reg = <0x0 0x1000>;
+                       fsl,num-laws = <8>;
+               };
+
+               ecm@1000 {
+                       compatible = "fsl,mpc8560-ecm", "fsl,ecm";
+                       reg = <0x1000 0x1000>;
+                       interrupts = <17 2>;
+                       interrupt-parent = <&mpic>;
+               };
+
                memory-controller@2000 {
                        compatible = "fsl,mpc8540-memory-controller";
                        reg = <0x2000 0x1000>;