perf/x86/intel/pt: add new capability for Intel PT

This adds support for "output to Trace Transport subsystem"
capability of Intel PT. It means that PT can output its
trace to an MMIO address range rather than system memory buffer.

Acked-by: Song Liu <songliubraving@fb.com>
Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c
index 918a43937749c3c23f51c76aa9c56723b638d6c6..9494ca68fd9df094ab9a699f4fd814b55114ee98 100644 (file)
--- a/arch/x86/events/intel/pt.c
+++ b/arch/x86/events/intel/pt.c
@@ -68,6 +68,7 @@ static struct pt_cap_desc {
        PT_CAP(topa_output,             0, CPUID_ECX, BIT(0)),
        PT_CAP(topa_multiple_entries,   0, CPUID_ECX, BIT(1)),
        PT_CAP(single_range_output,     0, CPUID_ECX, BIT(2)),
+       PT_CAP(output_subsys,           0, CPUID_ECX, BIT(3)),
        PT_CAP(payloads_lip,            0, CPUID_ECX, BIT(31)),
        PT_CAP(num_address_ranges,      1, CPUID_EAX, 0x3),
        PT_CAP(mtc_periods,             1, CPUID_EAX, 0xffff0000),

diff --git a/arch/x86/include/asm/intel_pt.h b/arch/x86/include/asm/intel_pt.h
index 00f4afb2b7de8afe15b464d30257bb12aaa9e51e..634f99b1dc22e8b584364c7544f787ab1d68641f 100644 (file)
--- a/arch/x86/include/asm/intel_pt.h
+++ b/arch/x86/include/asm/intel_pt.h
@@ -16,6 +16,7 @@ enum pt_capabilities {
        PT_CAP_topa_output,
        PT_CAP_topa_multiple_entries,
        PT_CAP_single_range_output,
+       PT_CAP_output_subsys,
        PT_CAP_payloads_lip,
        PT_CAP_num_address_ranges,
        PT_CAP_mtc_periods,