MIPS: RB532: Fix init of rb532_dev3_ctl_res
authorPhil Sutter <n0-1@freewrt.org>
Mon, 19 Jan 2009 22:42:50 +0000 (23:42 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 30 Jan 2009 21:33:00 +0000 (21:33 +0000)
This register just contains the address of the actual resource, so
initialisation has to be the same as cf_slot0_res and nand_slot0_res.

Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/rb532/gpio.c

index b195f797c438162f498d59235175b5ed0597dc9b..2f2cb8dc6531a4d8ddc2d915e4c78aea4a3856ac 100644 (file)
@@ -55,8 +55,6 @@ static struct resource rb532_gpio_reg0_res[] = {
 static struct resource rb532_dev3_ctl_res[] = {
        {
                .name   = "dev3_ctl",
-               .start  = REGBASE + DEV3BASE,
-               .end    = REGBASE + DEV3BASE + sizeof(struct dev_reg) - 1,
                .flags  = IORESOURCE_MEM,
        }
 };
@@ -251,6 +249,9 @@ int __init rb532_gpio_init(void)
        /* Register our GPIO chip */
        gpiochip_add(&rb532_gpio_chip->chip);
 
+       rb532_dev3_ctl_res[0].start = readl(IDT434_REG_BASE + DEV3BASE);
+       rb532_dev3_ctl_res[0].end = rb532_dev3_ctl_res[0].start + 0x1000;
+
        r = rb532_dev3_ctl_res;
        dev3.base = ioremap_nocache(r->start, r->end - r->start);