drm/i915: dev_priv and a small cascade of cleanups in i915_gem.c

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 4f0e56d3b4414cae5740938438ccb3c9b79f81eb..74f545a50eacb03e2a57ce464f360756b7432eff 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2426,7 +2426,7 @@ static int intel_runtime_resume(struct device *kdev)
         * No point of rolling back things in case of an error, as the best
         * we can do is to hope that things will still work (and disable RPM).
         */
-       i915_gem_init_swizzling(dev);
+       i915_gem_init_swizzling(dev_priv);
 
        intel_runtime_pm_enable_interrupts(dev_priv);
 

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5192206c62e22a539dd82f51406c322a0056ba5f..698116f57757ed3812d693b80183516d70abcc62 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3095,7 +3095,7 @@ void i915_gem_set_wedged(struct drm_i915_private *dev_priv);
 void i915_gem_clflush_object(struct drm_i915_gem_object *obj, bool force);
 int __must_check i915_gem_init(struct drm_device *dev);
 int __must_check i915_gem_init_hw(struct drm_device *dev);
-void i915_gem_init_swizzling(struct drm_device *dev);
+void i915_gem_init_swizzling(struct drm_i915_private *dev_priv);
 void i915_gem_cleanup_engines(struct drm_device *dev);
 int __must_check i915_gem_wait_for_idle(struct drm_i915_private *dev_priv,
                                        unsigned int flags);

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 3fb5e66e4d65d5c2ffce77b23f00e7a642b27c18..d7681fe0c0f86b532f7a8e543d33ec34b41abad3 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4241,11 +4241,9 @@ void i915_gem_resume(struct drm_device *dev)
        mutex_unlock(&dev->struct_mutex);
 }
 
-void i915_gem_init_swizzling(struct drm_device *dev)
+void i915_gem_init_swizzling(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = to_i915(dev);
-
-       if (INTEL_INFO(dev)->gen < 5 ||
+       if (INTEL_GEN(dev_priv) < 5 ||
            dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_NONE)
                return;
 
@@ -4316,14 +4314,14 @@ i915_gem_init_hw(struct drm_device *dev)
                        u32 temp = I915_READ(GEN7_MSG_CTL);
                        temp &= ~(WAIT_FOR_PCH_FLR_ACK | WAIT_FOR_PCH_RESET_ACK);
                        I915_WRITE(GEN7_MSG_CTL, temp);
-               } else if (INTEL_INFO(dev)->gen >= 7) {
+               } else if (INTEL_GEN(dev_priv) >= 7) {
                        u32 temp = I915_READ(HSW_NDE_RSTWRN_OPT);
                        temp &= ~RESET_PCH_HANDSHAKE_ENABLE;
                        I915_WRITE(HSW_NDE_RSTWRN_OPT, temp);
                }
        }
 
-       i915_gem_init_swizzling(dev);
+       i915_gem_init_swizzling(dev_priv);
 
        /*
         * At least 830 can leave some of the unused rings
@@ -4335,7 +4333,7 @@ i915_gem_init_hw(struct drm_device *dev)
 
        BUG_ON(!dev_priv->kernel_context);
 
-       ret = i915_ppgtt_init_hw(dev);
+       ret = i915_ppgtt_init_hw(dev_priv);
        if (ret) {
                DRM_ERROR("PPGTT enable HW failed %d\n", ret);
                goto out;

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 01f238adfb67df98ffa63658a969516f7d0f77a5..57e6177c0a34fb95550e89b4374fb0e2bc4f66ef 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1794,22 +1794,21 @@ static int gen6_mm_switch(struct i915_hw_ppgtt *ppgtt,
        return 0;
 }
 
-static void gen8_ppgtt_enable(struct drm_device *dev)
+static void gen8_ppgtt_enable(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = to_i915(dev);
        struct intel_engine_cs *engine;
        enum intel_engine_id id;
 
        for_each_engine(engine, dev_priv, id) {
-               u32 four_level = USES_FULL_48BIT_PPGTT(dev) ? GEN8_GFX_PPGTT_48B : 0;
+               u32 four_level = USES_FULL_48BIT_PPGTT(dev_priv) ?
+                                GEN8_GFX_PPGTT_48B : 0;
                I915_WRITE(RING_MODE_GEN7(engine),
                           _MASKED_BIT_ENABLE(GFX_PPGTT_ENABLE | four_level));
        }
 }
 
-static void gen7_ppgtt_enable(struct drm_device *dev)
+static void gen7_ppgtt_enable(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = to_i915(dev);
        struct intel_engine_cs *engine;
        uint32_t ecochk, ecobits;
        enum intel_engine_id id;
@@ -1833,9 +1832,8 @@ static void gen7_ppgtt_enable(struct drm_device *dev)
        }
 }
 
-static void gen6_ppgtt_enable(struct drm_device *dev)
+static void gen6_ppgtt_enable(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = to_i915(dev);
        uint32_t ecochk, gab_ctl, ecobits;
 
        ecobits = I915_READ(GAC_ECO_BITS);
@@ -2193,10 +2191,8 @@ static void i915_address_space_init(struct i915_address_space *vm,
        list_add_tail(&vm->global_link, &dev_priv->vm_list);
 }
 
-static void gtt_write_workarounds(struct drm_device *dev)
+static void gtt_write_workarounds(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = to_i915(dev);
-
        /* This function is for gtt related workarounds. This function is
         * called on driver load and after a GPU reset, so you can place
         * workarounds here even if they get overwritten by GPU reset.
@@ -2229,11 +2225,9 @@ static int i915_ppgtt_init(struct i915_hw_ppgtt *ppgtt,
        return ret;
 }
 
-int i915_ppgtt_init_hw(struct drm_device *dev)
+int i915_ppgtt_init_hw(struct drm_i915_private *dev_priv)
 {
-       struct drm_i915_private *dev_priv = to_i915(dev);
-
-       gtt_write_workarounds(dev);
+       gtt_write_workarounds(dev_priv);
 
        /* In the case of execlists, PPGTT is enabled by the context descriptor
         * and the PDPs are contained within the context itself.  We don't
@@ -2241,17 +2235,17 @@ int i915_ppgtt_init_hw(struct drm_device *dev)
        if (i915.enable_execlists)
                return 0;
 
-       if (!USES_PPGTT(dev))
+       if (!USES_PPGTT(dev_priv))
                return 0;
 
        if (IS_GEN6(dev_priv))
-               gen6_ppgtt_enable(dev);
+               gen6_ppgtt_enable(dev_priv);
        else if (IS_GEN7(dev_priv))
-               gen7_ppgtt_enable(dev);
-       else if (INTEL_INFO(dev)->gen >= 8)
-               gen8_ppgtt_enable(dev);
+               gen7_ppgtt_enable(dev_priv);
+       else if (INTEL_GEN(dev_priv) >= 8)
+               gen8_ppgtt_enable(dev_priv);
        else
-               MISSING_CASE(INTEL_INFO(dev)->gen);
+               MISSING_CASE(INTEL_GEN(dev_priv));
 
        return 0;
 }

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 57b5849c659e2f1fc0b7db5dd30426554e9ef93b..48b96033c67eb608d4f552f63c661b69ad59e284 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -495,7 +495,7 @@ int i915_ggtt_enable_hw(struct drm_i915_private *dev_priv);
 int i915_gem_init_ggtt(struct drm_i915_private *dev_priv);
 void i915_ggtt_cleanup_hw(struct drm_i915_private *dev_priv);
 
-int i915_ppgtt_init_hw(struct drm_device *dev);
+int i915_ppgtt_init_hw(struct drm_i915_private *dev_priv);
 void i915_ppgtt_release(struct kref *kref);
 struct i915_hw_ppgtt *i915_ppgtt_create(struct drm_i915_private *dev_priv,
                                        struct drm_i915_file_private *fpriv,