drm/amdgpu: fix IB alignment for UVD
authorAlex Deucher <alexander.deucher@amd.com>
Mon, 22 Aug 2016 20:31:36 +0000 (16:31 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 24 Aug 2016 20:25:02 +0000 (16:25 -0400)
According to the hw team, it should be 16, not 8.

Cc: Peter Fang <peter.fang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c

index 4c8e68a82c47fdb09ada972e67371f7b8588e40d..eab8d73132440fc3f00ed030d3c6a7f38fc19abe 100644 (file)
@@ -292,7 +292,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
                        type = AMD_IP_BLOCK_TYPE_UVD;
                        ring_mask = adev->uvd.ring.ready ? 1 : 0;
                        ib_start_alignment = AMDGPU_GPU_PAGE_SIZE;
-                       ib_size_alignment = 8;
+                       ib_size_alignment = 16;
                        break;
                case AMDGPU_HW_IP_VCE:
                        type = AMD_IP_BLOCK_TYPE_VCE;