Merge tag 'edac_updates_for_v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git...

Pull intel EDAC fixes from Tony Luck:

 - Old igen6 driver could lose pending events during initialization

 - Sapphire Rapids workstations have fewer memory controllers than their
   bigger siblings. This confused the driver.

* tag 'edac_updates_for_v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
  EDAC/igen6: Fix the issue of no error events
  EDAC/i10nm: Skip the absent memory controllers

diff --combined drivers/edac/i10nm_base.c
index 5abf997ca7c1c05cca53f06ba8d86817b25398b9,349ff6cfb3796e579348b7595b16370546f02da1..2b83d6de9352be81a21e65f5abcaca0cca2b6950
--- 1/drivers/edac/i10nm_base.c
--- 2/drivers/edac/i10nm_base.c
+++ b/drivers/edac/i10nm_base.c
@@@ -658,13 -658,49 +658,49 @@@ static struct pci_dev *get_ddr_munit(st
        return mdev;
  }
  
+ /**
+  * i10nm_imc_absent() - Check whether the memory controller @imc is absent
+  *
+  * @imc    : The pointer to the structure of memory controller EDAC device.
+  *
+  * RETURNS : true if the memory controller EDAC device is absent, false otherwise.
+  */
+ static bool i10nm_imc_absent(struct skx_imc *imc)
+ {
+       u32 mcmtr;
+       int i;
+ 
+       switch (res_cfg->type) {
+       case SPR:
+               for (i = 0; i < res_cfg->ddr_chan_num; i++) {
+                       mcmtr = I10NM_GET_MCMTR(imc, i);
+                       edac_dbg(1, "ch%d mcmtr reg %x\n", i, mcmtr);
+                       if (mcmtr != ~0)
+                               return false;
+               }
+ 
+               /*
+                * Some workstations' absent memory controllers still
+                * appear as PCIe devices, misleading the EDAC driver.
+                * By observing that the MMIO registers of these absent
+                * memory controllers consistently hold the value of ~0.
+                *
+                * We identify a memory controller as absent by checking
+                * if its MMIO register "mcmtr" == ~0 in all its channels.
+                */
+               return true;
+       default:
+               return false;
+       }
+ }
+ 
  static int i10nm_get_ddr_munits(void)
  {
        struct pci_dev *mdev;
        void __iomem *mbase;
        unsigned long size;
        struct skx_dev *d;
-       int i, j = 0;
+       int i, lmc, j = 0;
        u32 reg, off;
        u64 base;
  
@@@ -690,7 -726,7 +726,7 @@@
                edac_dbg(2, "socket%d mmio base 0x%llx (reg 0x%x)\n",
                         j++, base, reg);
  
-               for (i = 0; i < res_cfg->ddr_imc_num; i++) {
+               for (lmc = 0, i = 0; i < res_cfg->ddr_imc_num; i++) {
                        mdev = get_ddr_munit(d, i, &off, &size);
  
                        if (i == 0 && !mdev) {
@@@ -700,8 -736,6 +736,6 @@@
                        if (!mdev)
                                continue;
  
-                       d->imc[i].mdev = mdev;
- 
                        edac_dbg(2, "mc%d mmio base 0x%llx size 0x%lx (reg 0x%x)\n",
                                 i, base + off, size, reg);
  
@@@ -712,7 -746,17 +746,17 @@@
                                return -ENODEV;
                        }
  
-                       d->imc[i].mbase = mbase;
+                       d->imc[lmc].mbase = mbase;
+                       if (i10nm_imc_absent(&d->imc[lmc])) {
+                               pci_dev_put(mdev);
+                               iounmap(mbase);
+                               d->imc[lmc].mbase = NULL;
+                               edac_dbg(2, "Skip absent mc%d\n", i);
+                               continue;
+                       } else {
+                               d->imc[lmc].mdev = mdev;
+                               lmc++;
+                       }
                }
        }
  
@@@ -906,7 -950,7 +950,7 @@@ static const struct x86_cpu_id i10nm_cp
        X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SAPPHIRERAPIDS_X,  X86_STEPPINGS(0x0, 0xf), &spr_cfg),
        X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(EMERALDRAPIDS_X,   X86_STEPPINGS(0x0, 0xf), &spr_cfg),
        X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(GRANITERAPIDS_X,   X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
 -      X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SIERRAFOREST_X,    X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
 +      X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ATOM_CRESTMONT_X,  X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
        {}
  };
  MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);