pinctrl: rockchip: rk3328: Fix the correct routing config
authorDavid Wu <david.wu@rock-chips.com>
Sat, 30 Sep 2017 12:13:21 +0000 (20:13 +0800)
committerLinus Walleij <linus.walleij@linaro.org>
Sat, 7 Oct 2017 10:31:39 +0000 (12:31 +0200)
If the gmac-m1 optimization(bit10) is selected, the gpio function
of gmac pins is not valid. We may use the rmii mode for gmac interface,
the pins such as rx_d2, rx_d3, which the rgmii mode used, but rmii not
used could be taken as gpio function. So gmac_rxd0m1 selects the bit2,
and gmac_rxd0m3 select bit10 is more correct.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/pinctrl-rockchip.c

index c7c9bebab3faa65abe71287a8d55762ef7624691..9e0cabfd3893deea5f2bec6fe7069aed87a90cb5 100644 (file)
@@ -900,12 +900,19 @@ static struct rockchip_mux_route_data rk3328_mux_route_data[] = {
                .route_offset = 0x50,
                .route_val = BIT(16) | BIT(16 + 1) | BIT(0),
        }, {
-               /* gmac-m1-optimized_rxd0 */
+               /* gmac-m1_rxd0 */
                .bank_num = 1,
                .pin = 11,
                .func = 2,
                .route_offset = 0x50,
-               .route_val = BIT(16 + 2) | BIT(16 + 10) | BIT(2) | BIT(10),
+               .route_val = BIT(16 + 2) | BIT(2),
+       }, {
+               /* gmac-m1-optimized_rxd3 */
+               .bank_num = 1,
+               .pin = 14,
+               .func = 2,
+               .route_offset = 0x50,
+               .route_val = BIT(16 + 10) | BIT(10),
        }, {
                /* pdm_sdi0m0 */
                .bank_num = 2,