spi: expand mode support
authorSowjanya Komatineni <skomatineni@nvidia.com>
Mon, 15 Apr 2019 21:30:27 +0000 (14:30 -0700)
committerMark Brown <broonie@kernel.org>
Thu, 2 May 2019 01:37:55 +0000 (10:37 +0900)
This patch changes mode and mode_bits from u16 to u32 to allow more
mode configurations.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
include/linux/spi/spi.h

index 589f9dc9ac2b1740af0c814a90d66ad6343790ef..053abd22ad3167a0254e6a7403f10ab021f1630d 100644 (file)
@@ -143,7 +143,7 @@ struct spi_device {
        u32                     max_speed_hz;
        u8                      chip_select;
        u8                      bits_per_word;
-       u16                     mode;
+       u32                     mode;
 #define        SPI_CPHA        0x01                    /* clock phase */
 #define        SPI_CPOL        0x02                    /* clock polarity */
 #define        SPI_MODE_0      (0|0)                   /* (original MicroWire) */
@@ -443,7 +443,7 @@ struct spi_controller {
        u16                     dma_alignment;
 
        /* spi_device.mode flags understood by this controller driver */
-       u16                     mode_bits;
+       u32                     mode_bits;
 
        /* bitmask of supported bits_per_word for transfers */
        u32                     bits_per_word_mask;
@@ -1291,7 +1291,7 @@ struct spi_board_info {
        /* mode becomes spi_device.mode, and is essential for chips
         * where the default of SPI_CS_HIGH = 0 is wrong.
         */
-       u16             mode;
+       u32             mode;
 
        /* ... may need additional spi_device chip config data here.
         * avoid stuff protocol drivers can set; but include stuff