ARM: dts: imx6qdl-vicut1: add interrupt-counter nodes

interrupt-counter is mainline now, so we can add missing counter nodes.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6qdl-vicut1.dtsi b/arch/arm/boot/dts/imx6qdl-vicut1.dtsi
index eb25d21a2aceedf6fb0bc563616b4313bc95b286..b9e305774fedad121a0ab0ef6f86cef928087480 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-vicut1.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-vicut1.dtsi
@@ -40,6 +40,27 @@
                };
        };
 
+       counter-0 {
+               compatible = "interrupt-counter";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_counter0>;
+               gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
+       };
+
+       counter-1 {
+               compatible = "interrupt-counter";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_counter1>;
+               gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
+       };
+
+       counter-2 {
+               compatible = "interrupt-counter";
+               pinctrl-names = "default";
+               pinctrl-0 = <&pinctrl_counter2>;
+               gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
+       };
+
        gpio-keys {
                compatible = "gpio-keys";
                autorepeat;
@@ -254,7 +275,7 @@
 
 &gpio2 {
        gpio-line-names =
-               "", "", "", "", "", "", "", "",
+               "count0", "count1", "count2", "", "", "", "", "",
                "REV_ID0", "REV_ID1", "REV_ID2", "REV_ID3", "REV_ID4",
                        "BOARD_ID0", "BOARD_ID1", "BOARD_ID2",
                "", "", "", "", "", "", "", "ON_SWITCH",
@@ -572,6 +593,24 @@
                >;
        };
 
+       pinctrl_counter0: counter0grp {
+               fsl,pins = <
+                       MX6QDL_PAD_NANDF_D0__GPIO2_IO00                 0x1b000
+               >;
+       };
+
+       pinctrl_counter1: counter1grp {
+               fsl,pins = <
+                       MX6QDL_PAD_NANDF_D1__GPIO2_IO01                 0x1b000
+               >;
+       };
+
+       pinctrl_counter2: counter2grp {
+               fsl,pins = <
+                       MX6QDL_PAD_NANDF_D2__GPIO2_IO02                 0x1b000
+               >;
+       };
+
        pinctrl_ecspi1: ecspi1grp {
                fsl,pins = <
                        MX6QDL_PAD_EIM_D17__ECSPI1_MISO                 0x100b1