[WHY&HOW]
Add support for programming dp dto via dccg.
Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
#include "dce_clock_source.h"
#include "clk_mgr.h"
+#include "dccg.h"
#include "reg_helper.h"
DISPCLK_CHANGE_MODE_RAMPING,
};
+struct dp_dto_params {
+ int otg_inst;
+ enum signal_type signal;
+ long long pixclk_hz;
+ long long refclk_hz;
+};
+
enum pixel_rate_div {
PIXEL_RATE_DIV_BY_1 = 0,
PIXEL_RATE_DIV_BY_2 = 1,
struct dccg *dccg,
uint32_t stream_enc_inst,
uint32_t link_enc_inst);
+ void (*set_dp_dto)(
+ struct dccg *dccg,
+ const struct dp_dto_params *params);
};
#endif //__DAL_DCCG_H__