arm64: barrier: Add CSDB macros to control data-value prediction

For CPUs capable of data value prediction, CSDB waits for any outstanding
predictions to architecturally resolve before allowing speculative execution
to continue. Provide macros to expose it to the arch code.

Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index 544878a9f29e72235d121a829cc8674c92fc09d3..1f44b4255a2877d5a21ca4d7194f1c7053d58c73 100644 (file)
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -115,6 +115,13 @@
        hint    #16
        .endm
 
+/*
+ * Value prediction barrier
+ */
+       .macro  csdb
+       hint    #20
+       .endm
+
 /*
  * NOP sequence
  */

diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h
index 77651c49ef44196789c6326dcee3d780b8622607..c0a846d2c602232cdc1d9b6e0693129ff4808de7 100644 (file)
--- a/arch/arm64/include/asm/barrier.h
+++ b/arch/arm64/include/asm/barrier.h
@@ -32,6 +32,7 @@
 #define dsb(opt)       asm volatile("dsb " #opt : : : "memory")
 
 #define psb_csync()    asm volatile("hint #17" : : : "memory")
+#define csdb()         asm volatile("hint #20" : : : "memory")
 
 #define mb()           dsb(sy)
 #define rmb()          dsb(ld)