ARM: dts: Configure system timers for omap2
authorTony Lindgren <tony@atomide.com>
Thu, 7 May 2020 16:59:31 +0000 (09:59 -0700)
committerTony Lindgren <tony@atomide.com>
Tue, 19 May 2020 16:38:04 +0000 (09:38 -0700)
We can now init system timers using the dmtimer and 32k counter
based on only devicetree data and drivers/clocksource timers.
Let's configure the clocksource and clockevent, and drop the old
unused platform data.

As we're just dropping platform data, and the early platform data
init is based on the custom ti,hwmods property, we want to drop
both the platform data and ti,hwmods property in a single patch.

Since the dmtimer can use both 32k clock and system clock as the
source, let's also configure the SoC specific default values. The
board specific dts files can reconfigure these with assigned-clocks
and assigned-clock-parents as needed.

Let's also update the dts file to use #include while at it.

Cc: devicetree@vger.kernel.org
Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Keerthy <j-keerthy@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/omap2.dtsi
arch/arm/boot/dts/omap2420.dtsi
arch/arm/boot/dts/omap2430.dtsi
arch/arm/mach-omap2/board-generic.c
arch/arm/mach-omap2/omap_hwmod_2420_data.c
arch/arm/mach-omap2/omap_hwmod_2430_data.c
arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c
arch/arm/mach-omap2/omap_hwmod_common_data.h

index 0e453fec2e3a3b2d37a32f8669b81b2f62ac3be7..8a5cb44bfe2f40805f0775b9f43d4764d354e7e8 100644 (file)
                        clock-frequency = <48000000>;
                };
 
-               timer2: timer@4802a000 {
-                       compatible = "ti,omap2420-timer";
-                       reg = <0x4802a000 0x400>;
-                       interrupts = <38>;
-                       ti,hwmods = "timer2";
+               timer2_target: target-module@4802a000 {
+                       compatible = "ti,sysc-omap2-timer", "ti,sysc";
+                       reg = <0x4802a000 0x4>,
+                             <0x4802a010 0x4>,
+                             <0x4802a014 0x4>;
+                       reg-names = "rev", "sysc", "syss";
+                       ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+                                        SYSC_OMAP2_EMUFREE |
+                                        SYSC_OMAP2_ENAWAKEUP |
+                                        SYSC_OMAP2_SOFTRESET |
+                                        SYSC_OMAP2_AUTOIDLE)>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       ti,syss-mask = <1>;
+                       clocks = <&gpt2_fck>, <&gpt2_ick>;
+                       clock-names = "fck", "ick";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x4802a000 0x1000>;
+
+                       timer2: timer@0 {
+                               compatible = "ti,omap2420-timer";
+                               reg = <0 0x400>;
+                               interrupts = <38>;
+                       };
                };
 
                timer3: timer@48078000 {
index aba542d63d6d7cc9dc358236346961d5a486a3b8..6c5c7c0e8b94cf3c933ccec77474209763543bd3 100644 (file)
                                };
                        };
 
-                       counter32k: counter@4000 {
-                               compatible = "ti,omap-counter32k";
-                               reg = <0x4000 0x20>;
-                               ti,hwmods = "counter_32k";
+                       target-module@4000 {
+                               compatible = "ti,sysc-omap2", "ti,sysc";
+                               reg = <0x4000 0x4>,
+                                     <0x4004 0x4>;
+                               reg-names = "rev", "sysc";
+                               ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                               <SYSC_IDLE_NO>;
+                               clocks = <&func_32k_ck>;
+                               clock-names = "fck";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0x4000 0x1000>;
+
+                               counter32k: counter@0 {
+                                       compatible = "ti,omap-counter32k";
+                                       reg = <0 0x20>;
+                               };
                        };
                };
 
                        };
                };
 
-               timer1: timer@48028000 {
-                       compatible = "ti,omap2420-timer";
-                       reg = <0x48028000 0x400>;
-                       interrupts = <37>;
-                       ti,hwmods = "timer1";
-                       ti,timer-alwon;
+               timer1_target: target-module@48028000 {
+                       compatible = "ti,sysc-omap2-timer", "ti,sysc";
+                       reg = <0x48028000 0x4>,
+                             <0x48028010 0x4>,
+                             <0x48028014 0x4>;
+                       reg-names = "rev", "sysc", "syss";
+                       ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+                                        SYSC_OMAP2_EMUFREE |
+                                        SYSC_OMAP2_ENAWAKEUP |
+                                        SYSC_OMAP2_SOFTRESET |
+                                        SYSC_OMAP2_AUTOIDLE)>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       ti,syss-mask = <1>;
+                       clocks = <&gpt1_fck>, <&gpt1_ick>;
+                       clock-names = "fck", "ick";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x48028000 0x1000>;
+
+                       timer1: timer@0 {
+                               compatible = "ti,omap2420-timer";
+                               reg = <0 0x400>;
+                               interrupts = <37>;
+                               ti,timer-alwon;
+                       };
                };
 
                wd_timer2: wdt@48022000 {
        compatible = "ti,omap2420-i2c";
 };
 
-/include/ "omap24xx-clocks.dtsi"
-/include/ "omap2420-clocks.dtsi"
+#include "omap24xx-clocks.dtsi"
+#include "omap2420-clocks.dtsi"
+
+/* Preferred always-on timer for clockevent */
+&timer1_target {
+       ti,no-reset-on-init;
+       ti,no-idle;
+       timer@0 {
+               assigned-clocks = <&gpt1_fck>;
+               assigned-clock-parents = <&func_32k_ck>;
+       };
+};
index 15ef7593be128d5b8158be478cacbadfaf4c7b99..6a1f5bb3c06a1660a3b3c6da63dec0bf0f13862d 100644 (file)
                                };
                        };
 
-                       counter32k: counter@20000 {
-                               compatible = "ti,omap-counter32k";
-                               reg = <0x20000 0x20>;
-                               ti,hwmods = "counter_32k";
+                       target-module@20000 {
+                               compatible = "ti,sysc-omap2", "ti,sysc";
+                               reg = <0x20000 0x4>,
+                                     <0x20004 0x4>;
+                               reg-names = "rev", "sysc";
+                               ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                               <SYSC_IDLE_NO>;
+                               clocks = <&func_32k_ck>;
+                               clock-names = "fck";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0x0 0x20000 0x1000>;
+
+                               counter32k: counter@0 {
+                                       compatible = "ti,omap-counter32k";
+                                       reg = <0 0x20>;
+                               };
                        };
                };
 
                        };
                };
 
-               timer1: timer@49018000 {
-                       compatible = "ti,omap2420-timer";
-                       reg = <0x49018000 0x400>;
-                       interrupts = <37>;
-                       ti,hwmods = "timer1";
-                       ti,timer-alwon;
+               timer1_target: target-module@49018000 {
+                       compatible = "ti,sysc-omap2-timer", "ti,sysc";
+                       reg = <0x49018000 0x4>,
+                             <0x49018010 0x4>,
+                             <0x49018014 0x4>;
+                       reg-names = "rev", "sysc", "syss";
+                       ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
+                                        SYSC_OMAP2_EMUFREE |
+                                        SYSC_OMAP2_ENAWAKEUP |
+                                        SYSC_OMAP2_SOFTRESET |
+                                        SYSC_OMAP2_AUTOIDLE)>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       ti,syss-mask = <1>;
+                       clocks = <&gpt1_fck>, <&gpt1_ick>;
+                       clock-names = "fck", "ick";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x49018000 0x1000>;
+
+                       timer1: timer@0 {
+                               compatible = "ti,omap2420-timer";
+                               reg = <0 0x400>;
+                               interrupts = <37>;
+                               ti,timer-alwon;
+                       };
                };
 
                mcspi3: spi@480b8000 {
        compatible = "ti,omap2430-i2c";
 };
 
-/include/ "omap24xx-clocks.dtsi"
-/include/ "omap2430-clocks.dtsi"
+#include "omap24xx-clocks.dtsi"
+#include "omap2430-clocks.dtsi"
+
+/* Preferred always-on timer for clockevent */
+&timer1_target {
+       ti,no-reset-on-init;
+       ti,no-idle;
+       timer@0 {
+               assigned-clocks = <&gpt1_fck>;
+               assigned-clock-parents = <&func_32k_ck>;
+       };
+};
index eeb3f97af5209f0fa73e6d36a10058d80ebb5f96..cafeb822bab7df05754963beb1cf9e620983e540 100644 (file)
@@ -50,7 +50,7 @@ DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
        .map_io         = omap242x_map_io,
        .init_early     = omap2420_init_early,
        .init_machine   = omap_generic_init,
-       .init_time      = omap_init_time,
+       .init_time      = omap_init_time_of,
        .dt_compat      = omap242x_boards_compat,
        .restart        = omap2xxx_restart,
 MACHINE_END
@@ -67,7 +67,7 @@ DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
        .map_io         = omap243x_map_io,
        .init_early     = omap2430_init_early,
        .init_machine   = omap_generic_init,
-       .init_time      = omap_init_time,
+       .init_time      = omap_init_time_of,
        .dt_compat      = omap243x_boards_compat,
        .restart        = omap2xxx_restart,
 MACHINE_END
index b14442cf617957d79a49938b8c601dcaf1d9fb6f..558fae4375baad1a5b23c4757300da2e8f83e9f1 100644 (file)
@@ -264,14 +264,6 @@ static struct omap_hwmod_ocp_if omap2420_l3__dsp = {
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/* l4_wkup -> timer1 */
-static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = {
-       .master         = &omap2xxx_l4_wkup_hwmod,
-       .slave          = &omap2xxx_timer1_hwmod,
-       .clk            = "gpt1_ick",
-       .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
 /* l4_wkup -> wd_timer2 */
 static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = {
        .master         = &omap2xxx_l4_wkup_hwmod,
@@ -352,15 +344,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__hdq1w = {
        .flags          = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE,
 };
 
-
-/* l4_wkup -> 32ksync_counter */
-static struct omap_hwmod_ocp_if omap2420_l4_wkup__counter_32k = {
-       .master         = &omap2xxx_l4_wkup_hwmod,
-       .slave          = &omap2xxx_counter_32k_hwmod,
-       .clk            = "sync_32k_ick",
-       .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
 static struct omap_hwmod_ocp_if omap2420_l3__gpmc = {
        .master         = &omap2xxx_l3_main_hwmod,
        .slave          = &omap2xxx_gpmc_hwmod,
@@ -382,8 +365,6 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
        &omap2420_l4_core__i2c2,
        &omap2420_l3__iva,
        &omap2420_l3__dsp,
-       &omap2420_l4_wkup__timer1,
-       &omap2xxx_l4_core__timer2,
        &omap2xxx_l4_core__timer3,
        &omap2xxx_l4_core__timer4,
        &omap2xxx_l4_core__timer5,
@@ -411,7 +392,6 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
        &omap2xxx_l4_core__sham,
        &omap2xxx_l4_core__aes,
        &omap2420_l4_core__hdq1w,
-       &omap2420_l4_wkup__counter_32k,
        &omap2420_l3__gpmc,
        NULL,
 };
index 41a37c74f9a684a0a602e52a6507ace9af6d0f95..c93200801b34a0a9138bf2a366b859d178d84a6f 100644 (file)
@@ -436,14 +436,6 @@ static struct omap_hwmod_ocp_if omap2430_l3__iva = {
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/* l4_wkup -> timer1 */
-static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = {
-       .master         = &omap2xxx_l4_wkup_hwmod,
-       .slave          = &omap2xxx_timer1_hwmod,
-       .clk            = "gpt1_ick",
-       .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
 /* l4_wkup -> wd_timer2 */
 static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = {
        .master         = &omap2xxx_l4_wkup_hwmod,
@@ -548,14 +540,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__hdq1w = {
        .flags          = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE,
 };
 
-/* l4_wkup -> 32ksync_counter */
-static struct omap_hwmod_ocp_if omap2430_l4_wkup__counter_32k = {
-       .master         = &omap2xxx_l4_wkup_hwmod,
-       .slave          = &omap2xxx_counter_32k_hwmod,
-       .clk            = "sync_32k_ick",
-       .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
 static struct omap_hwmod_ocp_if omap2430_l3__gpmc = {
        .master         = &omap2xxx_l3_main_hwmod,
        .slave          = &omap2xxx_gpmc_hwmod,
@@ -581,8 +565,6 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
        &omap2xxx_l4_core__mcspi2,
        &omap2430_l4_core__mcspi3,
        &omap2430_l3__iva,
-       &omap2430_l4_wkup__timer1,
-       &omap2xxx_l4_core__timer2,
        &omap2xxx_l4_core__timer3,
        &omap2xxx_l4_core__timer4,
        &omap2xxx_l4_core__timer5,
@@ -613,7 +595,6 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
        &omap2xxx_l4_core__rng,
        &omap2xxx_l4_core__sham,
        &omap2xxx_l4_core__aes,
-       &omap2430_l4_wkup__counter_32k,
        &omap2430_l3__gpmc,
        NULL,
 };
index eef96adea411af14d155f05a0b7fed7e7e4a134b..518e877bb2a1e02a20623a53d23e14971d9f1e9d 100644 (file)
@@ -95,14 +95,6 @@ struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2 = {
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/* l4_core -> timer2 */
-struct omap_hwmod_ocp_if omap2xxx_l4_core__timer2 = {
-       .master         = &omap2xxx_l4_core_hwmod,
-       .slave          = &omap2xxx_timer2_hwmod,
-       .clk            = "gpt2_ick",
-       .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
 /* l4_core -> timer3 */
 struct omap_hwmod_ocp_if omap2xxx_l4_core__timer3 = {
        .master         = &omap2xxx_l4_core_hwmod,
index a445704d43d905a2cb130c7caeb4a05a3dd954b2..9156f2bfbc8d43002e44960340d2d5bdb94decfd 100644 (file)
@@ -195,36 +195,6 @@ struct omap_hwmod omap2xxx_iva_hwmod = {
        .class          = &iva_hwmod_class,
 };
 
-/* timer1 */
-struct omap_hwmod omap2xxx_timer1_hwmod = {
-       .name           = "timer1",
-       .main_clk       = "gpt1_fck",
-       .prcm           = {
-               .omap2 = {
-                       .module_offs = WKUP_MOD,
-                       .idlest_reg_id = 1,
-                       .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
-               },
-       },
-       .class          = &omap2xxx_timer_hwmod_class,
-       .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
-};
-
-/* timer2 */
-struct omap_hwmod omap2xxx_timer2_hwmod = {
-       .name           = "timer2",
-       .main_clk       = "gpt2_fck",
-       .prcm           = {
-               .omap2 = {
-                       .module_offs = CORE_MOD,
-                       .idlest_reg_id = 1,
-                       .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,
-               },
-       },
-       .class          = &omap2xxx_timer_hwmod_class,
-       .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
-};
-
 /* timer3 */
 struct omap_hwmod omap2xxx_timer3_hwmod = {
        .name           = "timer3",
@@ -595,23 +565,6 @@ struct omap_hwmod omap2xxx_mcspi2_hwmod = {
        .class          = &omap2xxx_mcspi_class,
 };
 
-static struct omap_hwmod_class omap2xxx_counter_hwmod_class = {
-       .name   = "counter",
-};
-
-struct omap_hwmod omap2xxx_counter_32k_hwmod = {
-       .name           = "counter_32k",
-       .main_clk       = "func_32k_ck",
-       .prcm           = {
-               .omap2  = {
-                       .module_offs = WKUP_MOD,
-                       .idlest_reg_id = 1,
-                       .idlest_idle_bit = OMAP24XX_ST_32KSYNC_SHIFT,
-               },
-       },
-       .class          = &omap2xxx_counter_hwmod_class,
-};
-
 /* gpmc */
 struct omap_hwmod omap2xxx_gpmc_hwmod = {
        .name           = "gpmc",
index c85cb8b5831cdbff5a8d241ac76ce84b83b7b13c..0045e6680a636027c2b4a967081fb69305d6f4b5 100644 (file)
@@ -21,8 +21,6 @@ extern struct omap_hwmod omap2xxx_l4_core_hwmod;
 extern struct omap_hwmod omap2xxx_l4_wkup_hwmod;
 extern struct omap_hwmod omap2xxx_mpu_hwmod;
 extern struct omap_hwmod omap2xxx_iva_hwmod;
-extern struct omap_hwmod omap2xxx_timer1_hwmod;
-extern struct omap_hwmod omap2xxx_timer2_hwmod;
 extern struct omap_hwmod omap2xxx_timer3_hwmod;
 extern struct omap_hwmod omap2xxx_timer4_hwmod;
 extern struct omap_hwmod omap2xxx_timer5_hwmod;
@@ -47,7 +45,6 @@ extern struct omap_hwmod omap2xxx_gpio3_hwmod;
 extern struct omap_hwmod omap2xxx_gpio4_hwmod;
 extern struct omap_hwmod omap2xxx_mcspi1_hwmod;
 extern struct omap_hwmod omap2xxx_mcspi2_hwmod;
-extern struct omap_hwmod omap2xxx_counter_32k_hwmod;
 extern struct omap_hwmod omap2xxx_gpmc_hwmod;
 extern struct omap_hwmod omap2xxx_rng_hwmod;
 extern struct omap_hwmod omap2xxx_sham_hwmod;