#include <sound/tlv.h>
#include "max98373.h"
-static struct reg_default max98373_reg[] = {
- {MAX98373_R2000_SW_RESET, 0x00},
- {MAX98373_R2001_INT_RAW1, 0x00},
- {MAX98373_R2002_INT_RAW2, 0x00},
- {MAX98373_R2003_INT_RAW3, 0x00},
- {MAX98373_R2004_INT_STATE1, 0x00},
- {MAX98373_R2005_INT_STATE2, 0x00},
- {MAX98373_R2006_INT_STATE3, 0x00},
- {MAX98373_R2007_INT_FLAG1, 0x00},
- {MAX98373_R2008_INT_FLAG2, 0x00},
- {MAX98373_R2009_INT_FLAG3, 0x00},
- {MAX98373_R200A_INT_EN1, 0x00},
- {MAX98373_R200B_INT_EN2, 0x00},
- {MAX98373_R200C_INT_EN3, 0x00},
- {MAX98373_R200D_INT_FLAG_CLR1, 0x00},
- {MAX98373_R200E_INT_FLAG_CLR2, 0x00},
- {MAX98373_R200F_INT_FLAG_CLR3, 0x00},
- {MAX98373_R2010_IRQ_CTRL, 0x00},
- {MAX98373_R2014_THERM_WARN_THRESH, 0x10},
- {MAX98373_R2015_THERM_SHDN_THRESH, 0x27},
- {MAX98373_R2016_THERM_HYSTERESIS, 0x01},
- {MAX98373_R2017_THERM_FOLDBACK_SET, 0xC0},
- {MAX98373_R2018_THERM_FOLDBACK_EN, 0x00},
- {MAX98373_R201E_PIN_DRIVE_STRENGTH, 0x55},
- {MAX98373_R2020_PCM_TX_HIZ_EN_1, 0xFE},
- {MAX98373_R2021_PCM_TX_HIZ_EN_2, 0xFF},
- {MAX98373_R2022_PCM_TX_SRC_1, 0x00},
- {MAX98373_R2023_PCM_TX_SRC_2, 0x00},
- {MAX98373_R2024_PCM_DATA_FMT_CFG, 0xC0},
- {MAX98373_R2025_AUDIO_IF_MODE, 0x00},
- {MAX98373_R2026_PCM_CLOCK_RATIO, 0x04},
- {MAX98373_R2027_PCM_SR_SETUP_1, 0x08},
- {MAX98373_R2028_PCM_SR_SETUP_2, 0x88},
- {MAX98373_R2029_PCM_TO_SPK_MONO_MIX_1, 0x00},
- {MAX98373_R202A_PCM_TO_SPK_MONO_MIX_2, 0x00},
- {MAX98373_R202B_PCM_RX_EN, 0x00},
- {MAX98373_R202C_PCM_TX_EN, 0x00},
- {MAX98373_R202E_ICC_RX_CH_EN_1, 0x00},
- {MAX98373_R202F_ICC_RX_CH_EN_2, 0x00},
- {MAX98373_R2030_ICC_TX_HIZ_EN_1, 0xFF},
- {MAX98373_R2031_ICC_TX_HIZ_EN_2, 0xFF},
- {MAX98373_R2032_ICC_LINK_EN_CFG, 0x30},
- {MAX98373_R2034_ICC_TX_CNTL, 0x00},
- {MAX98373_R2035_ICC_TX_EN, 0x00},
- {MAX98373_R2036_SOUNDWIRE_CTRL, 0x05},
- {MAX98373_R203D_AMP_DIG_VOL_CTRL, 0x00},
- {MAX98373_R203E_AMP_PATH_GAIN, 0x08},
- {MAX98373_R203F_AMP_DSP_CFG, 0x02},
- {MAX98373_R2040_TONE_GEN_CFG, 0x00},
- {MAX98373_R2041_AMP_CFG, 0x03},
- {MAX98373_R2042_AMP_EDGE_RATE_CFG, 0x00},
- {MAX98373_R2043_AMP_EN, 0x00},
- {MAX98373_R2046_IV_SENSE_ADC_DSP_CFG, 0x04},
- {MAX98373_R2047_IV_SENSE_ADC_EN, 0x00},
- {MAX98373_R2051_MEAS_ADC_SAMPLING_RATE, 0x00},
- {MAX98373_R2052_MEAS_ADC_PVDD_FLT_CFG, 0x00},
- {MAX98373_R2053_MEAS_ADC_THERM_FLT_CFG, 0x00},
- {MAX98373_R2054_MEAS_ADC_PVDD_CH_READBACK, 0x00},
- {MAX98373_R2055_MEAS_ADC_THERM_CH_READBACK, 0x00},
- {MAX98373_R2056_MEAS_ADC_PVDD_CH_EN, 0x00},
- {MAX98373_R2090_BDE_LVL_HOLD, 0x00},
- {MAX98373_R2091_BDE_GAIN_ATK_REL_RATE, 0x00},
- {MAX98373_R2092_BDE_CLIPPER_MODE, 0x00},
- {MAX98373_R2097_BDE_L1_THRESH, 0x00},
- {MAX98373_R2098_BDE_L2_THRESH, 0x00},
- {MAX98373_R2099_BDE_L3_THRESH, 0x00},
- {MAX98373_R209A_BDE_L4_THRESH, 0x00},
- {MAX98373_R209B_BDE_THRESH_HYST, 0x00},
- {MAX98373_R20A8_BDE_L1_CFG_1, 0x00},
- {MAX98373_R20A9_BDE_L1_CFG_2, 0x00},
- {MAX98373_R20AA_BDE_L1_CFG_3, 0x00},
- {MAX98373_R20AB_BDE_L2_CFG_1, 0x00},
- {MAX98373_R20AC_BDE_L2_CFG_2, 0x00},
- {MAX98373_R20AD_BDE_L2_CFG_3, 0x00},
- {MAX98373_R20AE_BDE_L3_CFG_1, 0x00},
- {MAX98373_R20AF_BDE_L3_CFG_2, 0x00},
- {MAX98373_R20B0_BDE_L3_CFG_3, 0x00},
- {MAX98373_R20B1_BDE_L4_CFG_1, 0x00},
- {MAX98373_R20B2_BDE_L4_CFG_2, 0x00},
- {MAX98373_R20B3_BDE_L4_CFG_3, 0x00},
- {MAX98373_R20B4_BDE_INFINITE_HOLD_RELEASE, 0x00},
- {MAX98373_R20B5_BDE_EN, 0x00},
- {MAX98373_R20B6_BDE_CUR_STATE_READBACK, 0x00},
- {MAX98373_R20D1_DHT_CFG, 0x01},
- {MAX98373_R20D2_DHT_ATTACK_CFG, 0x02},
- {MAX98373_R20D3_DHT_RELEASE_CFG, 0x03},
- {MAX98373_R20D4_DHT_EN, 0x00},
- {MAX98373_R20E0_LIMITER_THRESH_CFG, 0x00},
- {MAX98373_R20E1_LIMITER_ATK_REL_RATES, 0x00},
- {MAX98373_R20E2_LIMITER_EN, 0x00},
- {MAX98373_R20FE_DEVICE_AUTO_RESTART_CFG, 0x00},
- {MAX98373_R20FF_GLOBAL_SHDN, 0x00},
- {MAX98373_R21FF_REV_ID, 0x42},
-};
-
-static int max98373_dai_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
-{
- struct snd_soc_component *component = codec_dai->component;
- struct max98373_priv *max98373 = snd_soc_component_get_drvdata(component);
- unsigned int format = 0;
- unsigned int invert = 0;
-
- dev_dbg(component->dev, "%s: fmt 0x%08X\n", __func__, fmt);
-
- switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
- case SND_SOC_DAIFMT_NB_NF:
- break;
- case SND_SOC_DAIFMT_IB_NF:
- invert = MAX98373_PCM_MODE_CFG_PCM_BCLKEDGE;
- break;
- default:
- dev_err(component->dev, "DAI invert mode unsupported\n");
- return -EINVAL;
- }
-
- regmap_update_bits(max98373->regmap,
- MAX98373_R2026_PCM_CLOCK_RATIO,
- MAX98373_PCM_MODE_CFG_PCM_BCLKEDGE,
- invert);
-
- /* interface format */
- switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
- case SND_SOC_DAIFMT_I2S:
- format = MAX98373_PCM_FORMAT_I2S;
- break;
- case SND_SOC_DAIFMT_LEFT_J:
- format = MAX98373_PCM_FORMAT_LJ;
- break;
- case SND_SOC_DAIFMT_DSP_A:
- format = MAX98373_PCM_FORMAT_TDM_MODE1;
- break;
- case SND_SOC_DAIFMT_DSP_B:
- format = MAX98373_PCM_FORMAT_TDM_MODE0;
- break;
- default:
- return -EINVAL;
- }
-
- regmap_update_bits(max98373->regmap,
- MAX98373_R2024_PCM_DATA_FMT_CFG,
- MAX98373_PCM_MODE_CFG_FORMAT_MASK,
- format << MAX98373_PCM_MODE_CFG_FORMAT_SHIFT);
-
- return 0;
-}
-
-/* BCLKs per LRCLK */
-static const int bclk_sel_table[] = {
- 32, 48, 64, 96, 128, 192, 256, 384, 512, 320,
-};
-
-static int max98373_get_bclk_sel(int bclk)
-{
- int i;
- /* match BCLKs per LRCLK */
- for (i = 0; i < ARRAY_SIZE(bclk_sel_table); i++) {
- if (bclk_sel_table[i] == bclk)
- return i + 2;
- }
- return 0;
-}
-
-static int max98373_set_clock(struct snd_soc_component *component,
- struct snd_pcm_hw_params *params)
-{
- struct max98373_priv *max98373 = snd_soc_component_get_drvdata(component);
- /* BCLK/LRCLK ratio calculation */
- int blr_clk_ratio = params_channels(params) * max98373->ch_size;
- int value;
-
- if (!max98373->tdm_mode) {
- /* BCLK configuration */
- value = max98373_get_bclk_sel(blr_clk_ratio);
- if (!value) {
- dev_err(component->dev, "format unsupported %d\n",
- params_format(params));
- return -EINVAL;
- }
-
- regmap_update_bits(max98373->regmap,
- MAX98373_R2026_PCM_CLOCK_RATIO,
- MAX98373_PCM_CLK_SETUP_BSEL_MASK,
- value);
- }
- return 0;
-}
-
-static int max98373_dai_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params,
- struct snd_soc_dai *dai)
-{
- struct snd_soc_component *component = dai->component;
- struct max98373_priv *max98373 = snd_soc_component_get_drvdata(component);
- unsigned int sampling_rate = 0;
- unsigned int chan_sz = 0;
-
- /* pcm mode configuration */
- switch (snd_pcm_format_width(params_format(params))) {
- case 16:
- chan_sz = MAX98373_PCM_MODE_CFG_CHANSZ_16;
- break;
- case 24:
- chan_sz = MAX98373_PCM_MODE_CFG_CHANSZ_24;
- break;
- case 32:
- chan_sz = MAX98373_PCM_MODE_CFG_CHANSZ_32;
- break;
- default:
- dev_err(component->dev, "format unsupported %d\n",
- params_format(params));
- goto err;
- }
-
- max98373->ch_size = snd_pcm_format_width(params_format(params));
-
- regmap_update_bits(max98373->regmap,
- MAX98373_R2024_PCM_DATA_FMT_CFG,
- MAX98373_PCM_MODE_CFG_CHANSZ_MASK, chan_sz);
-
- dev_dbg(component->dev, "format supported %d",
- params_format(params));
-
- /* sampling rate configuration */
- switch (params_rate(params)) {
- case 8000:
- sampling_rate = MAX98373_PCM_SR_SET1_SR_8000;
- break;
- case 11025:
- sampling_rate = MAX98373_PCM_SR_SET1_SR_11025;
- break;
- case 12000:
- sampling_rate = MAX98373_PCM_SR_SET1_SR_12000;
- break;
- case 16000:
- sampling_rate = MAX98373_PCM_SR_SET1_SR_16000;
- break;
- case 22050:
- sampling_rate = MAX98373_PCM_SR_SET1_SR_22050;
- break;
- case 24000:
- sampling_rate = MAX98373_PCM_SR_SET1_SR_24000;
- break;
- case 32000:
- sampling_rate = MAX98373_PCM_SR_SET1_SR_32000;
- break;
- case 44100:
- sampling_rate = MAX98373_PCM_SR_SET1_SR_44100;
- break;
- case 48000:
- sampling_rate = MAX98373_PCM_SR_SET1_SR_48000;
- break;
- case 88200:
- sampling_rate = MAX98373_PCM_SR_SET1_SR_88200;
- break;
- case 96000:
- sampling_rate = MAX98373_PCM_SR_SET1_SR_96000;
- break;
- default:
- dev_err(component->dev, "rate %d not supported\n",
- params_rate(params));
- goto err;
- }
-
- /* set DAI_SR to correct LRCLK frequency */
- regmap_update_bits(max98373->regmap,
- MAX98373_R2027_PCM_SR_SETUP_1,
- MAX98373_PCM_SR_SET1_SR_MASK,
- sampling_rate);
- regmap_update_bits(max98373->regmap,
- MAX98373_R2028_PCM_SR_SETUP_2,
- MAX98373_PCM_SR_SET2_SR_MASK,
- sampling_rate << MAX98373_PCM_SR_SET2_SR_SHIFT);
-
- /* set sampling rate of IV */
- if (max98373->interleave_mode &&
- sampling_rate > MAX98373_PCM_SR_SET1_SR_16000)
- regmap_update_bits(max98373->regmap,
- MAX98373_R2028_PCM_SR_SETUP_2,
- MAX98373_PCM_SR_SET2_IVADC_SR_MASK,
- sampling_rate - 3);
- else
- regmap_update_bits(max98373->regmap,
- MAX98373_R2028_PCM_SR_SETUP_2,
- MAX98373_PCM_SR_SET2_IVADC_SR_MASK,
- sampling_rate);
-
- return max98373_set_clock(component, params);
-err:
- return -EINVAL;
-}
-
-static int max98373_dai_tdm_slot(struct snd_soc_dai *dai,
- unsigned int tx_mask, unsigned int rx_mask,
- int slots, int slot_width)
-{
- struct snd_soc_component *component = dai->component;
- struct max98373_priv *max98373 = snd_soc_component_get_drvdata(component);
- int bsel = 0;
- unsigned int chan_sz = 0;
- unsigned int mask;
- int x, slot_found;
-
- if (!tx_mask && !rx_mask && !slots && !slot_width)
- max98373->tdm_mode = false;
- else
- max98373->tdm_mode = true;
-
- /* BCLK configuration */
- bsel = max98373_get_bclk_sel(slots * slot_width);
- if (bsel == 0) {
- dev_err(component->dev, "BCLK %d not supported\n",
- slots * slot_width);
- return -EINVAL;
- }
-
- regmap_update_bits(max98373->regmap,
- MAX98373_R2026_PCM_CLOCK_RATIO,
- MAX98373_PCM_CLK_SETUP_BSEL_MASK,
- bsel);
-
- /* Channel size configuration */
- switch (slot_width) {
- case 16:
- chan_sz = MAX98373_PCM_MODE_CFG_CHANSZ_16;
- break;
- case 24:
- chan_sz = MAX98373_PCM_MODE_CFG_CHANSZ_24;
- break;
- case 32:
- chan_sz = MAX98373_PCM_MODE_CFG_CHANSZ_32;
- break;
- default:
- dev_err(component->dev, "format unsupported %d\n",
- slot_width);
- return -EINVAL;
- }
-
- regmap_update_bits(max98373->regmap,
- MAX98373_R2024_PCM_DATA_FMT_CFG,
- MAX98373_PCM_MODE_CFG_CHANSZ_MASK, chan_sz);
-
- /* Rx slot configuration */
- slot_found = 0;
- mask = rx_mask;
- for (x = 0 ; x < 16 ; x++, mask >>= 1) {
- if (mask & 0x1) {
- if (slot_found == 0)
- regmap_update_bits(max98373->regmap,
- MAX98373_R2029_PCM_TO_SPK_MONO_MIX_1,
- MAX98373_PCM_TO_SPK_CH0_SRC_MASK, x);
- else
- regmap_write(max98373->regmap,
- MAX98373_R202A_PCM_TO_SPK_MONO_MIX_2,
- x);
- slot_found++;
- if (slot_found > 1)
- break;
- }
- }
-
- /* Tx slot Hi-Z configuration */
- regmap_write(max98373->regmap,
- MAX98373_R2020_PCM_TX_HIZ_EN_1,
- ~tx_mask & 0xFF);
- regmap_write(max98373->regmap,
- MAX98373_R2021_PCM_TX_HIZ_EN_2,
- (~tx_mask & 0xFF00) >> 8);
-
- return 0;
-}
-
-#define MAX98373_RATES SNDRV_PCM_RATE_8000_96000
-
-#define MAX98373_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
- SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
-
-static const struct snd_soc_dai_ops max98373_dai_ops = {
- .set_fmt = max98373_dai_set_fmt,
- .hw_params = max98373_dai_hw_params,
- .set_tdm_slot = max98373_dai_tdm_slot,
-};
-
static int max98373_dac_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
0, 60, TLV_DB_SCALE_ITEM(-1500, 25, 0),
);
-static bool max98373_readable_register(struct device *dev, unsigned int reg)
-{
- switch (reg) {
- case MAX98373_R2000_SW_RESET:
- case MAX98373_R2001_INT_RAW1 ... MAX98373_R200C_INT_EN3:
- case MAX98373_R2010_IRQ_CTRL:
- case MAX98373_R2014_THERM_WARN_THRESH
- ... MAX98373_R2018_THERM_FOLDBACK_EN:
- case MAX98373_R201E_PIN_DRIVE_STRENGTH
- ... MAX98373_R2036_SOUNDWIRE_CTRL:
- case MAX98373_R203D_AMP_DIG_VOL_CTRL ... MAX98373_R2043_AMP_EN:
- case MAX98373_R2046_IV_SENSE_ADC_DSP_CFG
- ... MAX98373_R2047_IV_SENSE_ADC_EN:
- case MAX98373_R2051_MEAS_ADC_SAMPLING_RATE
- ... MAX98373_R2056_MEAS_ADC_PVDD_CH_EN:
- case MAX98373_R2090_BDE_LVL_HOLD ... MAX98373_R2092_BDE_CLIPPER_MODE:
- case MAX98373_R2097_BDE_L1_THRESH
- ... MAX98373_R209B_BDE_THRESH_HYST:
- case MAX98373_R20A8_BDE_L1_CFG_1 ... MAX98373_R20B3_BDE_L4_CFG_3:
- case MAX98373_R20B5_BDE_EN ... MAX98373_R20B6_BDE_CUR_STATE_READBACK:
- case MAX98373_R20D1_DHT_CFG ... MAX98373_R20D4_DHT_EN:
- case MAX98373_R20E0_LIMITER_THRESH_CFG ... MAX98373_R20E2_LIMITER_EN:
- case MAX98373_R20FE_DEVICE_AUTO_RESTART_CFG
- ... MAX98373_R20FF_GLOBAL_SHDN:
- case MAX98373_R21FF_REV_ID:
- return true;
- default:
- return false;
- }
-};
-
-static bool max98373_volatile_reg(struct device *dev, unsigned int reg)
-{
- switch (reg) {
- case MAX98373_R2000_SW_RESET ... MAX98373_R2009_INT_FLAG3:
- case MAX98373_R203E_AMP_PATH_GAIN:
- case MAX98373_R2054_MEAS_ADC_PVDD_CH_READBACK:
- case MAX98373_R2055_MEAS_ADC_THERM_CH_READBACK:
- case MAX98373_R20B6_BDE_CUR_STATE_READBACK:
- case MAX98373_R21FF_REV_ID:
- return true;
- default:
- return false;
- }
-}
-
static const char * const max98373_output_voltage_lvl_text[] = {
"5.43V", "6.09V", "6.83V", "7.67V", "8.60V",
"9.65V", "10.83V", "12.15V", "13.63V", "15.29V"
{ "Speaker FB Sense", NULL, "SpkFB Sense" },
};
-static struct snd_soc_dai_driver max98373_dai[] = {
- {
- .name = "max98373-aif1",
- .playback = {
- .stream_name = "HiFi Playback",
- .channels_min = 1,
- .channels_max = 2,
- .rates = MAX98373_RATES,
- .formats = MAX98373_FORMATS,
- },
- .capture = {
- .stream_name = "HiFi Capture",
- .channels_min = 1,
- .channels_max = 2,
- .rates = MAX98373_RATES,
- .formats = MAX98373_FORMATS,
- },
- .ops = &max98373_dai_ops,
- }
-};
-
-static void max98373_reset(struct max98373_priv *max98373, struct device *dev)
+void max98373_reset(struct max98373_priv *max98373, struct device *dev)
{
int ret, reg, count;
}
dev_err(dev, "Reset failed. (ret:%d)\n", ret);
}
+EXPORT_SYMBOL_GPL(max98373_reset);
static int max98373_probe(struct snd_soc_component *component)
{
regmap_write(max98373->regmap,
MAX98373_R202A_PCM_TO_SPK_MONO_MIX_2,
0x1);
- /* Set inital volume (0dB) */
- regmap_write(max98373->regmap,
- MAX98373_R203D_AMP_DIG_VOL_CTRL,
- 0x00);
- regmap_write(max98373->regmap,
- MAX98373_R203E_AMP_PATH_GAIN,
- 0x00);
/* Enable DC blocker */
regmap_write(max98373->regmap,
MAX98373_R203F_AMP_DSP_CFG,
return 0;
}
-#ifdef CONFIG_PM_SLEEP
-static int max98373_suspend(struct device *dev)
-{
- struct max98373_priv *max98373 = dev_get_drvdata(dev);
-
- regcache_cache_only(max98373->regmap, true);
- regcache_mark_dirty(max98373->regmap);
- return 0;
-}
-static int max98373_resume(struct device *dev)
-{
- struct max98373_priv *max98373 = dev_get_drvdata(dev);
-
- regcache_cache_only(max98373->regmap, false);
- max98373_reset(max98373, dev);
- regcache_sync(max98373->regmap);
- return 0;
-}
-#endif
-
-static const struct dev_pm_ops max98373_pm = {
- SET_SYSTEM_SLEEP_PM_OPS(max98373_suspend, max98373_resume)
-};
-
-static const struct snd_soc_component_driver soc_codec_dev_max98373 = {
+const struct snd_soc_component_driver soc_codec_dev_max98373 = {
.probe = max98373_probe,
.controls = max98373_snd_controls,
.num_controls = ARRAY_SIZE(max98373_snd_controls),
.num_dapm_widgets = ARRAY_SIZE(max98373_dapm_widgets),
.dapm_routes = max98373_audio_map,
.num_dapm_routes = ARRAY_SIZE(max98373_audio_map),
- .idle_bias_on = 1,
.use_pmdown_time = 1,
.endianness = 1,
.non_legacy_dai_naming = 1,
};
+EXPORT_SYMBOL_GPL(soc_codec_dev_max98373);
-static const struct regmap_config max98373_regmap = {
- .reg_bits = 16,
- .val_bits = 8,
- .max_register = MAX98373_R21FF_REV_ID,
- .reg_defaults = max98373_reg,
- .num_reg_defaults = ARRAY_SIZE(max98373_reg),
- .readable_reg = max98373_readable_register,
- .volatile_reg = max98373_volatile_reg,
- .cache_type = REGCACHE_RBTREE,
+const struct snd_soc_component_driver soc_codec_dev_max98373_sdw = {
+ .probe = NULL,
+ .controls = max98373_snd_controls,
+ .num_controls = ARRAY_SIZE(max98373_snd_controls),
+ .dapm_widgets = max98373_dapm_widgets,
+ .num_dapm_widgets = ARRAY_SIZE(max98373_dapm_widgets),
+ .dapm_routes = max98373_audio_map,
+ .num_dapm_routes = ARRAY_SIZE(max98373_audio_map),
+ .use_pmdown_time = 1,
+ .endianness = 1,
+ .non_legacy_dai_naming = 1,
};
+EXPORT_SYMBOL_GPL(soc_codec_dev_max98373_sdw);
-static void max98373_slot_config(struct i2c_client *i2c,
- struct max98373_priv *max98373)
+void max98373_slot_config(struct device *dev,
+ struct max98373_priv *max98373)
{
int value;
- struct device *dev = &i2c->dev;
if (!device_property_read_u32(dev, "maxim,vmon-slot-no", &value))
max98373->v_slot = value & 0xF;
else
max98373->spkfb_slot = 2;
}
-
-static int max98373_i2c_probe(struct i2c_client *i2c,
- const struct i2c_device_id *id)
-{
-
- int ret = 0;
- int reg = 0;
- struct max98373_priv *max98373 = NULL;
-
- max98373 = devm_kzalloc(&i2c->dev, sizeof(*max98373), GFP_KERNEL);
-
- if (!max98373) {
- ret = -ENOMEM;
- return ret;
- }
- i2c_set_clientdata(i2c, max98373);
-
- /* update interleave mode info */
- if (device_property_read_bool(&i2c->dev, "maxim,interleave_mode"))
- max98373->interleave_mode = true;
- else
- max98373->interleave_mode = false;
-
- /* regmap initialization */
- max98373->regmap
- = devm_regmap_init_i2c(i2c, &max98373_regmap);
- if (IS_ERR(max98373->regmap)) {
- ret = PTR_ERR(max98373->regmap);
- dev_err(&i2c->dev,
- "Failed to allocate regmap: %d\n", ret);
- return ret;
- }
-
- /* voltage/current slot & gpio configuration */
- max98373_slot_config(i2c, max98373);
-
- /* Power on device */
- if (gpio_is_valid(max98373->reset_gpio)) {
- ret = devm_gpio_request(&i2c->dev, max98373->reset_gpio,
- "MAX98373_RESET");
- if (ret) {
- dev_err(&i2c->dev, "%s: Failed to request gpio %d\n",
- __func__, max98373->reset_gpio);
- return -EINVAL;
- }
- gpio_direction_output(max98373->reset_gpio, 0);
- msleep(50);
- gpio_direction_output(max98373->reset_gpio, 1);
- msleep(20);
- }
-
- /* Check Revision ID */
- ret = regmap_read(max98373->regmap,
- MAX98373_R21FF_REV_ID, ®);
- if (ret < 0) {
- dev_err(&i2c->dev,
- "Failed to read: 0x%02X\n", MAX98373_R21FF_REV_ID);
- return ret;
- }
- dev_info(&i2c->dev, "MAX98373 revisionID: 0x%02X\n", reg);
-
- /* codec registeration */
- ret = devm_snd_soc_register_component(&i2c->dev, &soc_codec_dev_max98373,
- max98373_dai, ARRAY_SIZE(max98373_dai));
- if (ret < 0)
- dev_err(&i2c->dev, "Failed to register codec: %d\n", ret);
-
- return ret;
-}
-
-static const struct i2c_device_id max98373_i2c_id[] = {
- { "max98373", 0},
- { },
-};
-
-MODULE_DEVICE_TABLE(i2c, max98373_i2c_id);
-
-#if defined(CONFIG_OF)
-static const struct of_device_id max98373_of_match[] = {
- { .compatible = "maxim,max98373", },
- { }
-};
-MODULE_DEVICE_TABLE(of, max98373_of_match);
-#endif
-
-#ifdef CONFIG_ACPI
-static const struct acpi_device_id max98373_acpi_match[] = {
- { "MX98373", 0 },
- {},
-};
-MODULE_DEVICE_TABLE(acpi, max98373_acpi_match);
-#endif
-
-static struct i2c_driver max98373_i2c_driver = {
- .driver = {
- .name = "max98373",
- .of_match_table = of_match_ptr(max98373_of_match),
- .acpi_match_table = ACPI_PTR(max98373_acpi_match),
- .pm = &max98373_pm,
- },
- .probe = max98373_i2c_probe,
- .id_table = max98373_i2c_id,
-};
-
-module_i2c_driver(max98373_i2c_driver)
+EXPORT_SYMBOL_GPL(max98373_slot_config);
MODULE_DESCRIPTION("ALSA SoC MAX98373 driver");
MODULE_AUTHOR("Ryan Lee <ryans.lee@maximintegrated.com>");
{
int btn_type, val;
- val = snd_soc_component_read32(component, RT5682_4BTN_IL_CMD_1);
+ val = snd_soc_component_read(component, RT5682_4BTN_IL_CMD_1);
btn_type = val & 0xfff0;
snd_soc_component_write(component, RT5682_4BTN_IL_CMD_1, val);
dev_dbg(component->dev, "%s btn_type=%x\n", __func__, btn_type);
RT5682_TRIG_JD_MASK, RT5682_TRIG_JD_HIGH);
count = 0;
- val = snd_soc_component_read32(component, RT5682_CBJ_CTRL_2)
+ val = snd_soc_component_read(component, RT5682_CBJ_CTRL_2)
& RT5682_JACK_TYPE_MASK;
while (val == 0 && count < 50) {
usleep_range(10000, 15000);
- val = snd_soc_component_read32(component,
+ val = snd_soc_component_read(component,
RT5682_CBJ_CTRL_2) & RT5682_JACK_TYPE_MASK;
count++;
}
RT5682_HP_CHARGE_PUMP_1,
RT5682_OSW_L_MASK | RT5682_OSW_R_MASK,
RT5682_OSW_L_EN | RT5682_OSW_R_EN);
+ snd_soc_component_update_bits(component, RT5682_MICBIAS_2,
+ RT5682_PWR_CLK25M_MASK | RT5682_PWR_CLK1M_MASK,
+ RT5682_PWR_CLK25M_PU | RT5682_PWR_CLK1M_PU);
} else {
rt5682_enable_push_button_irq(component, false);
snd_soc_component_update_bits(component, RT5682_CBJ_CTRL_1,
RT5682_TRIG_JD_MASK, RT5682_TRIG_JD_LOW);
- if (snd_soc_dapm_get_pin_status(dapm, "MICBIAS"))
+ if (!snd_soc_dapm_get_pin_status(dapm, "MICBIAS"))
snd_soc_component_update_bits(component,
- RT5682_PWR_ANLG_1, RT5682_PWR_VREF2, 0);
- else
+ RT5682_PWR_ANLG_1, RT5682_PWR_MB, 0);
+ if (!snd_soc_dapm_get_pin_status(dapm, "Vref2"))
snd_soc_component_update_bits(component,
- RT5682_PWR_ANLG_1,
- RT5682_PWR_VREF2 | RT5682_PWR_MB, 0);
+ RT5682_PWR_ANLG_1, RT5682_PWR_VREF2, 0);
snd_soc_component_update_bits(component, RT5682_PWR_ANLG_3,
RT5682_PWR_CBJ, 0);
+ snd_soc_component_update_bits(component, RT5682_MICBIAS_2,
+ RT5682_PWR_CLK25M_MASK | RT5682_PWR_CLK1M_MASK,
+ RT5682_PWR_CLK25M_PD | RT5682_PWR_CLK1M_PD);
rt5682->jack_type = 0;
}
RT5682_POW_ANA, RT5682_POW_IRQ |
RT5682_POW_JDH | RT5682_POW_ANA);
regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2,
- RT5682_PWR_JDH | RT5682_PWR_JDL,
- RT5682_PWR_JDH | RT5682_PWR_JDL);
+ RT5682_PWR_JDH, RT5682_PWR_JDH);
regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2,
RT5682_JD1_EN_MASK | RT5682_JD1_POL_MASK,
RT5682_JD1_EN | RT5682_JD1_POL_NOR);
mutex_lock(&rt5682->calibrate_mutex);
- val = snd_soc_component_read32(rt5682->component, RT5682_AJD1_CTRL)
+ val = snd_soc_component_read(rt5682->component, RT5682_AJD1_CTRL)
& RT5682_JDH_RS_MASK;
if (!val) {
/* jack in */
/* jack was out, report jack type */
rt5682->jack_type =
rt5682_headset_detect(rt5682->component, 1);
- } else {
+ } else if ((rt5682->jack_type & SND_JACK_HEADSET) ==
+ SND_JACK_HEADSET) {
/* jack is already in, report button event */
rt5682->jack_type = SND_JACK_HEADSET;
btn_type = rt5682_button_detect(rt5682->component);
if (rt5682->is_sdw)
return 0;
- val = snd_soc_component_read32(component, RT5682_GPIO_CTRL_1) &
+ val = snd_soc_component_read(component, RT5682_GPIO_CTRL_1) &
RT5682_GP4_PIN_MASK;
if (w->shift == RT5682_PWR_ADC_S1F_BIT &&
val == RT5682_GP4_PIN_ADCDAT2)
struct snd_soc_component *component =
snd_soc_dapm_to_component(w->dapm);
- val = snd_soc_component_read32(component, RT5682_GLB_CLK);
+ val = snd_soc_component_read(component, RT5682_GLB_CLK);
val &= RT5682_SCLK_SRC_MASK;
if (val == RT5682_SCLK_SRC_PLL1)
return 1;
struct snd_soc_component *component =
snd_soc_dapm_to_component(w->dapm);
- val = snd_soc_component_read32(component, RT5682_GLB_CLK);
+ val = snd_soc_component_read(component, RT5682_GLB_CLK);
val &= RT5682_SCLK_SRC_MASK;
if (val == RT5682_SCLK_SRC_PLL2)
return 1;
return 0;
}
- val = (snd_soc_component_read32(component, reg) >> shift) & 0xf;
+ val = (snd_soc_component_read(component, reg) >> shift) & 0xf;
switch (val) {
case RT5682_CLK_SEL_I2S1_ASRC:
case RT5682_CLK_SEL_I2S2_ASRC:
0, set_filter_clk, SND_SOC_DAPM_PRE_PMU),
SND_SOC_DAPM_SUPPLY("Vref1", RT5682_PWR_ANLG_1, RT5682_PWR_VREF1_BIT, 0,
rt5682_set_verf, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
- SND_SOC_DAPM_SUPPLY("Vref2", RT5682_PWR_ANLG_1, RT5682_PWR_VREF2_BIT, 0,
- NULL, 0),
+ SND_SOC_DAPM_SUPPLY("Vref2", SND_SOC_NOPM, 0, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("MICBIAS", SND_SOC_NOPM, 0, 0, NULL, 0),
/* ASRC */
{
struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
struct rl6231_pll_code pll_code, pll2f_code, pll2b_code;
- unsigned int pll2_fout1;
+ unsigned int pll2_fout1, pll2_ps_val;
int ret;
if (source == rt5682->pll_src[pll_id] &&
pll2b_code.n_code);
snd_soc_component_write(component, RT5682_PLL2_CTRL_3,
pll2f_code.n_code << RT5682_PLL2F_N_SFT);
+
+ if (freq_out == 22579200)
+ pll2_ps_val = 1 << RT5682_PLL2B_SEL_PS_SFT;
+ else
+ pll2_ps_val = 1 << RT5682_PLL2B_PS_BYP_SFT;
snd_soc_component_update_bits(component, RT5682_PLL2_CTRL_4,
+ RT5682_PLL2B_SEL_PS_MASK | RT5682_PLL2B_PS_BYP_MASK |
RT5682_PLL2B_M_BP_MASK | RT5682_PLL2F_M_BP_MASK | 0xf,
+ pll2_ps_val |
(pll2b_code.m_bp ? 1 : 0) << RT5682_PLL2B_M_BP_SFT |
(pll2f_code.m_bp ? 1 : 0) << RT5682_PLL2F_M_BP_SFT |
0xf);
#ifdef CONFIG_COMMON_CLK
#define CLK_PLL2_FIN 48000000
-#define CLK_PLL2_FOUT 24576000
#define CLK_48 48000
+#define CLK_44 44100
static bool rt5682_clk_check(struct rt5682_priv *rt5682)
{
snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS");
snd_soc_component_update_bits(component, RT5682_PWR_ANLG_1,
RT5682_PWR_MB, RT5682_PWR_MB);
+
+ snd_soc_dapm_force_enable_pin_unlocked(dapm, "Vref2");
+ snd_soc_component_update_bits(component, RT5682_PWR_ANLG_1,
+ RT5682_PWR_VREF2 | RT5682_PWR_FV2,
+ RT5682_PWR_VREF2);
+ usleep_range(55000, 60000);
+ snd_soc_component_update_bits(component, RT5682_PWR_ANLG_1,
+ RT5682_PWR_FV2, RT5682_PWR_FV2);
+
snd_soc_dapm_force_enable_pin_unlocked(dapm, "I2S1");
snd_soc_dapm_force_enable_pin_unlocked(dapm, "PLL2F");
snd_soc_dapm_force_enable_pin_unlocked(dapm, "PLL2B");
snd_soc_dapm_mutex_lock(dapm);
snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS");
+ snd_soc_dapm_disable_pin_unlocked(dapm, "Vref2");
if (!rt5682->jack_type)
snd_soc_component_update_bits(component, RT5682_PWR_ANLG_1,
+ RT5682_PWR_VREF2 | RT5682_PWR_FV2 |
RT5682_PWR_MB, 0);
+
snd_soc_dapm_disable_pin_unlocked(dapm, "I2S1");
snd_soc_dapm_disable_pin_unlocked(dapm, "PLL2F");
snd_soc_dapm_disable_pin_unlocked(dapm, "PLL2B");
struct rt5682_priv *rt5682 =
container_of(hw, struct rt5682_priv,
dai_clks_hw[RT5682_DAI_WCLK_IDX]);
+ struct snd_soc_component *component = rt5682->component;
+ const char * const clk_name = __clk_get_name(hw->clk);
if (!rt5682_clk_check(rt5682))
return 0;
/*
- * Only accept to set wclk rate to 48kHz temporarily.
+ * Only accept to set wclk rate to 44.1k or 48kHz.
*/
- return CLK_48;
+ if (rt5682->lrck[RT5682_AIF1] != CLK_48 &&
+ rt5682->lrck[RT5682_AIF1] != CLK_44) {
+ dev_warn(component->dev, "%s: clk %s only support %d or %d Hz output\n",
+ __func__, clk_name, CLK_44, CLK_48);
+ return 0;
+ }
+
+ return rt5682->lrck[RT5682_AIF1];
}
static long rt5682_wclk_round_rate(struct clk_hw *hw, unsigned long rate,
struct rt5682_priv *rt5682 =
container_of(hw, struct rt5682_priv,
dai_clks_hw[RT5682_DAI_WCLK_IDX]);
+ struct snd_soc_component *component = rt5682->component;
+ const char * const clk_name = __clk_get_name(hw->clk);
if (!rt5682_clk_check(rt5682))
return -EINVAL;
/*
- * Only accept to set wclk rate to 48kHz temporarily.
+ * Only accept to set wclk rate to 44.1k or 48kHz.
+ * It will force to 48kHz if not both.
*/
- return CLK_48;
+ if (rate != CLK_48 && rate != CLK_44) {
+ dev_warn(component->dev, "%s: clk %s only support %d or %d Hz output\n",
+ __func__, clk_name, CLK_44, CLK_48);
+ rate = CLK_48;
+ }
+
+ return rate;
}
static int rt5682_wclk_set_rate(struct clk_hw *hw, unsigned long rate,
struct clk *parent_clk;
const char * const clk_name = __clk_get_name(hw->clk);
int pre_div;
+ unsigned int clk_pll2_out;
if (!rt5682_clk_check(rt5682))
return -EINVAL;
clk_name, CLK_PLL2_FIN);
/*
- * It's a temporary limitation. Only accept to set wclk rate to 48kHz.
- * It will force wclk to 48kHz even it's not.
- */
- if (rate != CLK_48) {
- dev_warn(component->dev, "clk %s only support %d Hz output\n",
- clk_name, CLK_48);
- rate = CLK_48;
- }
-
- /*
- * To achieve the rate conversion from 48MHz to 48kHz, PLL2 is needed.
+ * To achieve the rate conversion from 48MHz to 44.1k or 48kHz,
+ * PLL2 is needed.
*/
+ clk_pll2_out = rate * 512;
rt5682_set_component_pll(component, RT5682_PLL2, RT5682_PLL2_S_MCLK,
- CLK_PLL2_FIN, CLK_PLL2_FOUT);
+ CLK_PLL2_FIN, clk_pll2_out);
rt5682_set_component_sysclk(component, RT5682_SCLK_S_PLL2, 0,
- CLK_PLL2_FOUT, SND_SOC_CLOCK_IN);
+ clk_pll2_out, SND_SOC_CLOCK_IN);
+
+ rt5682->lrck[RT5682_AIF1] = rate;
pre_div = rl6231_get_clk_info(rt5682->sysclk, rate);
struct snd_soc_component *component = rt5682->component;
unsigned int bclks_per_wclk;
- snd_soc_component_read(component, RT5682_TDM_TCON_CTRL,
- &bclks_per_wclk);
+ bclks_per_wclk = snd_soc_component_read(component, RT5682_TDM_TCON_CTRL);
switch (bclks_per_wclk & RT5682_TDM_BCLK_MS1_MASK) {
case RT5682_TDM_BCLK_MS1_256:
struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
struct sdw_slave *slave;
unsigned long time;
+ struct snd_soc_dapm_context *dapm = &component->dapm;
#ifdef CONFIG_COMMON_CLK
int ret;
#endif
}
+ snd_soc_dapm_disable_pin(dapm, "MICBIAS");
+ snd_soc_dapm_disable_pin(dapm, "Vref2");
+ snd_soc_dapm_sync(dapm);
return 0;
}
dev_err(rt5682->component->dev, "HP Calibration Failure\n");
/* restore settings */
- regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0x02af);
+ regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0x002f);
regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080);
regmap_write(rt5682->regmap, RT5682_GLB_CLK, 0x0000);
regmap_write(rt5682->regmap, RT5682_PWR_DIG_1, 0x0000);
regmap_write(rt5682->regmap, RT5682_CHOP_DAC, 0x2000);
regmap_write(rt5682->regmap, RT5682_CALIB_ADC_CTRL, 0x2005);
regmap_write(rt5682->regmap, RT5682_STO1_ADC_MIXER, 0xc0c4);
+ regmap_write(rt5682->regmap, RT5682_CAL_REC, 0x0c0c);
mutex_unlock(&rt5682->calibrate_mutex);
}
git.samba.org / sfrench / cifs-2.6.git / commitdiff