Revert "ARM: dts: sunxi: Use sun4i-a10-apb1-clk for sun6i/sun8i apb2 clocks."
authorArnd Bergmann <arnd@arndb.de>
Mon, 24 Nov 2014 21:01:24 +0000 (22:01 +0100)
committerArnd Bergmann <arnd@arndb.de>
Mon, 24 Nov 2014 21:06:22 +0000 (22:06 +0100)
This reverts commit 338302ae32b7be73da97b746f660b283642cfc5c.

This is one of two commits that resulted in a boot regression.

Conflicts:
arch/arm/boot/dts/sun6i-a31.dtsi

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: http://lkml.kernel.org/r/7h1toxr0ku.fsf@deeprootsystems.com
arch/arm/boot/dts/sun6i-a31.dtsi
arch/arm/boot/dts/sun8i-a23.dtsi

index f1519a8a2ac7518aeb19f2f811f1ed9cb924811c..529c738039766cd92e94d6d71b5d93fe909f68a6 100644 (file)
                                        "apb1_daudio1";
                };
 
-               apb2: clk@01c20058 {
+               apb2_mux: apb2_mux@01c20058 {
                        #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-a10-apb1-clk";
+                       compatible = "allwinner,sun4i-a10-apb1-mux-clk";
                        reg = <0x01c20058 0x4>;
                        clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>;
+                       clock-output-names = "apb2_mux";
+               };
+
+               apb2: apb2@01c20058 {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun6i-a31-apb2-div-clk";
+                       reg = <0x01c20058 0x4>;
+                       clocks = <&apb2_mux>;
                        clock-output-names = "apb2";
                };
 
index 0746cd1024d7a73b32bcbf6002954a4859d77ee5..6086adbf9d749adf1fb2040fb76675e84292bab9 100644 (file)
                                        "apb1_daudio0", "apb1_daudio1";
                };
 
-               apb2clk@01c20058 {
+               apb2_mux: apb2_mux_clk@01c20058 {
                        #clock-cells = <0>;
-                       compatible = "allwinner,sun4i-a10-apb1-clk";
+                       compatible = "allwinner,sun4i-a10-apb1-mux-clk";
                        reg = <0x01c20058 0x4>;
                        clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>;
+                       clock-output-names = "apb2_mux";
+               };
+
+               apb2: apb2_clk@01c20058 {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun6i-a31-apb2-div-clk";
+                       reg = <0x01c20058 0x4>;
+                       clocks = <&apb2_mux>;
                        clock-output-names = "apb2";
                };