ARM: dts: ls1021a: add nodes for on-chip ram

Although the two nodes constitute one contiguous 128K region, still
describe them separately:

- That's how they are described in the reference manual: "Each OCRAM
  occupies a 64 KB of address region...", and the names ocram1 and
  ocram2 are also as used in the manual.

- The two areas are treated differently by the boot ROM code: OCRAM2 is
  zero-initialized, while, again quoting the RM, "software must perform
  the zero initialization of OCRAM1."

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index c31dad98f989d26a7f3ae1252fce5bfce62432aa..fbd2897566c389c9e923062afde12e19d141266b 100644 (file)
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -788,5 +788,21 @@ can3: can@2aa0000 {
                        clock-names = "ipg", "per";
                        big-endian;
                };
+
+               ocram1: sram@10000000 {
+                       compatible = "mmio-sram";
+                       reg = <0x0 0x10000000 0x0 0x10000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x0 0x10000000 0x10000>;
+               };
+
+               ocram2: sram@10010000 {
+                       compatible = "mmio-sram";
+                       reg = <0x0 0x10010000 0x0 0x10000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x0 0x10010000 0x10000>;
+               };
        };
 };