Merge tag 'uniphier-dt64-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/masah...

UniPhier ARM64 SoC DT updates for v5.3

- Migrate to the new binding for the Denali NAND controller

- Use reserved-memory node instead of /memreserve/ for the
  secure memory area

* tag 'uniphier-dt64-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
  arm64: dts: uniphier: add reserved-memory for secure memory
  arm64: dts: uniphier: update to new Denali NAND binding

Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts b/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
index 7968d524351b3e83ce227784164cf690f5daa158..f72f048a0c9d056cf714f0ef2b1f7c18e9051467 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts
@@ -163,4 +163,8 @@
 
 &nand {
        status = "okay";
+
+       nand@0 {
+               reg = <0>;
+       };
 };

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index a3cd475b48d2bace6ee45bb78fcbe63955b2a923..8ec40a0b8b1ef05e1b4dc4ba142ecbfd0564c3fd 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -8,8 +8,6 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/gpio/uniphier-gpio.h>
 
-/memreserve/ 0x80000000 0x02000000;
-
 / {
        compatible = "socionext,uniphier-ld11";
        #address-cells = <2>;
@@ -110,6 +108,17 @@
                             <1 10 4>;
        };
 
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               secure-memory@81000000 {
+                       reg = <0x0 0x81000000 0x0 0x01000000>;
+                       no-map;
+               };
+       };
+
        soc@0 {
                compatible = "simple-bus";
                #address-cells = <1>;
@@ -617,6 +626,8 @@
                        status = "disabled";
                        reg-names = "nand_data", "denali_reg";
                        reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_nand>;

diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 017f6328c191dcd00187ff73d7c6a14a0b790116..b658f2b641e2933abb35ae19d5d8220b8b481371 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -9,8 +9,6 @@
 #include <dt-bindings/gpio/uniphier-gpio.h>
 #include <dt-bindings/thermal/thermal.h>
 
-/memreserve/ 0x80000000 0x02000000;
-
 / {
        compatible = "socionext,uniphier-ld20";
        #address-cells = <2>;
@@ -215,6 +213,17 @@
                };
        };
 
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               secure-memory@81000000 {
+                       reg = <0x0 0x81000000 0x0 0x01000000>;
+                       no-map;
+               };
+       };
+
        soc@0 {
                compatible = "simple-bus";
                #address-cells = <1>;
@@ -921,6 +930,8 @@
                        status = "disabled";
                        reg-names = "nand_data", "denali_reg";
                        reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_nand>;

diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
index 1965e4dfe4a4778de7b914605d8c78f96560f0d0..754315bbd1c88096dd9ed21af4af606db2d09062 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
@@ -115,4 +115,8 @@
 
 &nand {
        status = "okay";
+
+       nand@0 {
+               reg = <0>;
+       };
 };

diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
index bb97abe1a55f5b14e982b464b783b54ea0dbe745..d6f6cee4d549199481c6d030fc0f9e1db012c2c7 100644 (file)
--- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi
@@ -8,8 +8,6 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/gpio/uniphier-gpio.h>
 
-/memreserve/ 0x80000000 0x02000000;
-
 / {
        compatible = "socionext,uniphier-pxs3";
        #address-cells = <2>;
@@ -138,6 +136,17 @@
                             <1 10 4>;
        };
 
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               secure-memory@81000000 {
+                       reg = <0x0 0x81000000 0x0 0x01000000>;
+                       no-map;
+               };
+       };
+
        soc@0 {
                compatible = "simple-bus";
                #address-cells = <1>;
@@ -779,6 +788,8 @@
                        status = "disabled";
                        reg-names = "nand_data", "denali_reg";
                        reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                        interrupts = <0 65 4>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&pinctrl_nand>;