clk: ingenic: Support specifying "wait for clock stable" delay

Some clocks need a small delay after being ungated to run stable, as
using them too soon might result in hardware lockups.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/drivers/clk/ingenic/cgu.c b/drivers/clk/ingenic/cgu.c
index 4b31145eb8aaec68ca99185d5841efbbca892ddf..5ef7d9ba2195d42b19a03b3bcb5f7ee12b4c26bc 100644 (file)
--- a/drivers/clk/ingenic/cgu.c
+++ b/drivers/clk/ingenic/cgu.c
@@ -512,6 +512,9 @@ static int ingenic_clk_enable(struct clk_hw *hw)
                spin_lock_irqsave(&cgu->lock, flags);
                ingenic_cgu_gate_set(cgu, &clk_info->gate, false);
                spin_unlock_irqrestore(&cgu->lock, flags);
+
+               if (clk_info->gate.delay_us)
+                       udelay(clk_info->gate.delay_us);
        }
 
        return 0;

diff --git a/drivers/clk/ingenic/cgu.h b/drivers/clk/ingenic/cgu.h
index 4d2e3fad0e30cbc2b80c8c99df776499987dc1f3..542192376ebffd1abf0401f2b3d809d23696f703 100644 (file)
--- a/drivers/clk/ingenic/cgu.h
+++ b/drivers/clk/ingenic/cgu.h
@@ -112,11 +112,13 @@ struct ingenic_cgu_fixdiv_info {
  * @reg: offset of the gate control register within the CGU
  * @bit: offset of the bit in the register that controls the gate
  * @clear_to_gate: if set, the clock is gated when the bit is cleared
+ * @delay_us: delay in microseconds after which the clock is considered stable
  */
 struct ingenic_cgu_gate_info {
        unsigned reg;
        u8 bit;
        bool clear_to_gate;
+       u16 delay_us;
 };
 
 /**