documentation: Fix pinctrl documentation for Meson8 / Meson8b
authorCarlo Caione <carlo@endlessm.com>
Wed, 23 Mar 2016 09:14:00 +0000 (10:14 +0100)
committerCarlo Caione <carlo@endlessm.com>
Wed, 30 Mar 2016 17:51:57 +0000 (19:51 +0200)
Fix pin controller documentation introducing the new compatibles for
the pinctrl drivers specific for aobus / cbus.

This is needed because we have changed the pin controller driver: we
have now a single specialized pinctrl driver / compatible for each bus
the controller is attached to, instead of one single driver dealing with
all the controllers we have on different buses.

Signed-off-by: Carlo Caione <carlo@endlessm.com>
Acked-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt

index 3f6a524cc5ffce28dddb0f2d9e0717098ec6a5a9..32f4a2d6d0b31dc76d458e854c51375c291ea3b0 100644 (file)
@@ -1,13 +1,16 @@
 == Amlogic Meson pinmux controller ==
 
 Required properties for the root node:
- - compatible: "amlogic,meson8-pinctrl" or "amlogic,meson8b-pinctrl"
+ - compatible: one of "amlogic,meson8-cbus-pinctrl"
+                     "amlogic,meson8b-cbus-pinctrl"
+                     "amlogic,meson8-aobus-pinctrl"
+                     "amlogic,meson8b-aobus-pinctrl"
  - reg: address and size of registers controlling irq functionality
 
 === GPIO sub-nodes ===
 
-The 2 power domains of the controller (regular and always-on) are
-represented as sub-nodes and each of them acts as a GPIO controller.
+The GPIO bank for the controller is represented as a sub-node and it acts as a
+GPIO controller.
 
 Required properties for sub-nodes are:
  - reg: should contain address and size for mux, pull-enable, pull and
@@ -18,10 +21,6 @@ Required properties for sub-nodes are:
  - gpio-controller: identifies the node as a gpio controller
  - #gpio-cells: must be 2
 
-Valid sub-node names are:
- - "banks" for the regular domain
- - "ao-bank" for the always-on domain
-
 === Other sub-nodes ===
 
 Child nodes without the "gpio-controller" represent some desired
@@ -45,7 +44,7 @@ pinctrl-bindings.txt
 === Example ===
 
        pinctrl: pinctrl@c1109880 {
-               compatible = "amlogic,meson8-pinctrl";
+               compatible = "amlogic,meson8-cbus-pinctrl";
                reg = <0xc1109880 0x10>;
                #address-cells = <1>;
                #size-cells = <1>;
@@ -61,15 +60,6 @@ pinctrl-bindings.txt
                        #gpio-cells = <2>;
                };
 
-               gpio_ao: ao-bank@c1108030 {
-                       reg = <0xc8100014 0x4>,
-                             <0xc810002c 0x4>,
-                             <0xc8100024 0x8>;
-                       reg-names = "mux", "pull", "gpio";
-                       gpio-controller;
-                       #gpio-cells = <2>;
-               };
-
                nand {
                        mux {
                                groups = "nand_io", "nand_io_ce0", "nand_io_ce1",
@@ -79,18 +69,4 @@ pinctrl-bindings.txt
                                function = "nand";
                        };
                };
-
-               uart_ao_a {
-                       mux {
-                               groups = "uart_tx_ao_a", "uart_rx_ao_a",
-                                        "uart_cts_ao_a", "uart_rts_ao_a";
-                               function = "uart_ao";
-                       };
-
-                       conf {
-                               pins = "GPIOAO_0", "GPIOAO_1",
-                                      "GPIOAO_2", "GPIOAO_3";
-                               bias-disable;
-                       };
-               };
        };