drm/i915/dp: prevent potential div-by-zero
authorNikita Zhandarovich <n.zhandarovich@fintech.ru>
Tue, 18 Apr 2023 14:04:30 +0000 (07:04 -0700)
committerJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Thu, 11 May 2023 11:11:59 +0000 (14:11 +0300)
drm_dp_dsc_sink_max_slice_count() may return 0 if something goes
wrong on the part of the DSC sink and its DPCD register. This null
value may be later used as a divisor in intel_dsc_compute_params(),
which will lead to an error.
In the unlikely event that this issue occurs, fix it by testing the
return value of drm_dp_dsc_sink_max_slice_count() against zero.

Found by Linux Verification Center (linuxtesting.org) with static
analysis tool SVACE.

Fixes: a4a157777c80 ("drm/i915/dp: Compute DSC pipe config in atomic check")
Signed-off-by: Nikita Zhandarovich <n.zhandarovich@fintech.ru>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230418140430.69902-1-n.zhandarovich@fintech.ru
(cherry picked from commit 51f7008239de011370c5067bbba07f0207f06b72)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
drivers/gpu/drm/i915/display/intel_dp.c

index f0bace9d98a18c16e5564f97506d540d786875d6..529ee22be872e7aea648d85aa54b0269095bb278 100644 (file)
@@ -1601,6 +1601,11 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
                pipe_config->dsc.slice_count =
                        drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd,
                                                        true);
+               if (!pipe_config->dsc.slice_count) {
+                       drm_dbg_kms(&dev_priv->drm, "Unsupported Slice Count %d\n",
+                                   pipe_config->dsc.slice_count);
+                       return -EINVAL;
+               }
        } else {
                u16 dsc_max_output_bpp = 0;
                u8 dsc_dp_slice_count;