arm64: dts: rockchip: Enable SPI1 on Ficus

Enable SPI1 exposed on both Low and High speed expansion connectors
of Ficus. SPI1 has 3 different chip selects wired as below:

CS0 - Serial Flash (unpopulated)
CS1 - Low Speed expansion
CS2 - High Speed expansion

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
index 6b059bd7a04fe2ee2acbb7c67507064ad64c0155..ebe2ee77ba1f60aaeec9914b7158c83a90cb23e7 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
@@ -146,6 +146,12 @@
        };
 };
 
+&spi1 {
+       /* On both Low speed and High speed expansion */
+       cs-gpios = <0>, <&gpio4 RK_PA6 0>, <&gpio4 RK_PA7 0>;
+       status = "okay";
+};
+
 &usbdrd_dwc3_0 {
        dr_mode = "host";
 };