drm/amdgpu/gmc6: disable legacy vga features in gmc init (v2)

Needs to be done when the MC is set up.

v2: make consistent with other asics

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index 886df09020675f5f07473536308ac89039185d7f..93c45f26b7c8645d4a8ba9a74f126c6f5f21b8aa 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -249,7 +249,19 @@ static void gmc_v6_0_mc_program(struct amdgpu_device *adev)
                dev_warn(adev->dev, "Wait for MC idle timedout !\n");
        }
 
-       WREG32(mmVGA_HDP_CONTROL, VGA_HDP_CONTROL__VGA_MEMORY_DISABLE_MASK);
+       if (adev->mode_info.num_crtc) {
+               u32 tmp;
+
+               /* Lockout access through VGA aperture*/
+               tmp = RREG32(mmVGA_HDP_CONTROL);
+               tmp |= VGA_HDP_CONTROL__VGA_MEMORY_DISABLE_MASK;
+               WREG32(mmVGA_HDP_CONTROL, tmp);
+
+               /* disable VGA render */
+               tmp = RREG32(mmVGA_RENDER_CONTROL);
+               tmp &= ~VGA_VSTATUS_CNTL;
+               WREG32(mmVGA_RENDER_CONTROL, tmp);
+       }
        /* Update configuration */
        WREG32(mmMC_VM_SYSTEM_APERTURE_LOW_ADDR,
               adev->mc.vram_start >> 12);