MIPS: Loongson-3: IRQ balancing for PCI devices
authorHuacai Chen <chenhc@lemote.com>
Thu, 22 Jun 2017 15:06:52 +0000 (23:06 +0800)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 29 Jun 2017 00:42:23 +0000 (02:42 +0200)
commite1b88ca8d72193e48bac026b19b8c686cc7fea25
treea2e67cb32810807f78b40364dfdea349360cba8f
parent99b0b5a3a1e994247e7533de0fd7e4d13ead0ddd
MIPS: Loongson-3: IRQ balancing for PCI devices

IRQ0 (HPET), IRQ1 (Keyboard), IRQ2 (Cascade), IRQ7 (SCI), IRQ8 (RTC)
and IRQ12 (Mouse) are handled by core-0 locally. Other PCI IRQs (3, 4,
5, 6, 14, 15) are balanced by all cores from Node-0. This can improve
I/O performance significantly.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J . Hill <Steven.Hill@cavium.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16589/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/loongson64/loongson-3/irq.c
arch/mips/loongson64/loongson-3/smp.c