pinctrl: sh-pfc: r8a7796: Add support for INTC-EX IRQ pins
authorTakeshi Kihara <takeshi.kihara.df@renesas.com>
Mon, 24 Oct 2016 11:40:09 +0000 (20:40 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 11 Oct 2017 09:34:00 +0000 (11:34 +0200)
commitb014912f6c462223229bb9865ceb1a363984c521
treeb47e07440b1f528beea5c73c0e6a665d3e272b0c
parent8480e6ca800046d14bfc610a24f2317341250b04
pinctrl: sh-pfc: r8a7796: Add support for INTC-EX IRQ pins

Most pins on the r8a7796 SoC can be configured in GPIO mode for
interrupt and GPIO functionality, while a couple of them can also
be routed to the INTC-EX hardware block (formerly known as IRQC).

On r8a7795 the INTC-EX hardware handles pins IRQ0 -> IRQ5 and
this patch adds support for them to the PFC driver as "intc_ex_irqN".

[takeshi.kihara.df: Ported from commit bb46f6f3f3bf ("pinctrl: sh-pfc:
 r8a7795: Add support for INTC-EX IRQ pins")
 to drivers/pinctrl/sh-pfc/pfc-r8a7796.c]
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/pinctrl/sh-pfc/pfc-r8a7796.c