xtensa: fix xtensa_wsr always writing 0
authorMax Filippov <jcmvbkbc@gmail.com>
Sun, 20 Mar 2022 16:40:14 +0000 (09:40 -0700)
committerMax Filippov <jcmvbkbc@gmail.com>
Sun, 20 Mar 2022 16:53:01 +0000 (09:53 -0700)
commita3d0245c58f962ee99d4440ea0eaf45fb7f5a5cc
treed54d47f0b54b445920c3c3de6e0b66eeafeff666
parent7dc0eb0b6d9f3e2b6a560a04f86ef065a4531a9f
xtensa: fix xtensa_wsr always writing 0

The commit cad6fade6e78 ("xtensa: clean up WSR*/RSR*/get_sr/set_sr")
replaced 'WSR' macro in the function xtensa_wsr with 'xtensa_set_sr',
but variable 'v' in the xtensa_set_sr body shadowed the argument 'v'
passed to it, resulting in wrong value written to debug registers.

Fix that by removing intermediate variable from the xtensa_set_sr
macro body.

Cc: stable@vger.kernel.org
Fixes: cad6fade6e78 ("xtensa: clean up WSR*/RSR*/get_sr/set_sr")
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
arch/xtensa/include/asm/processor.h