drm/i915/ehl: Update port clock voltage level requirements
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 7 Feb 2020 00:14:16 +0000 (16:14 -0800)
committerMatt Roper <matthew.d.roper@intel.com>
Mon, 10 Feb 2020 17:51:17 +0000 (09:51 -0800)
commit9d5fd37ed7e26efdbe90f492d7eb8b53dcdb61d6
tree89c27f272b80b4bc01a4c33e5394920bb0dd3941
parentceaaf5300f881e54bba4221a710a40b48423f610
drm/i915/ehl: Update port clock voltage level requirements

Voltage level depends not only on the cdclk, but also on the DDI clock.
Last time the bspec voltage level table for EHL was updated, we only
updated the cdclk requirements, but forgot to account for the new port
clock criteria.

Bspec: 21809
Fixes: d147483884ed ("drm/i915/ehl: Update voltage level checks")
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200207001417.1229251-1-matthew.d.roper@intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
drivers/gpu/drm/i915/display/intel_ddi.c