drm/i915/execlists: Use coherent writes into the context image
authorChris Wilson <chris@chris-wilson.co.uk>
Fri, 14 Sep 2018 12:35:04 +0000 (13:35 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Fri, 14 Sep 2018 13:23:34 +0000 (14:23 +0100)
commit666424abfb863e3e51fcd35baad5f242fc69d314
tree1dc0a7efa3cdc937937a6094d3745a44b425b6fb
parent37d7c9cc2eb6620bf1130de1ca28eb1da0b8ede8
drm/i915/execlists: Use coherent writes into the context image

That we use a WB mapping for updating the RING_TAIL register inside the
context image even on !llc machines has been a source of consternation
for every reader. It appears to work on bsw+, but it may just have been
that we have been incredibly bad at detecting the errors.

v2: With extra enthusiasm.
v3: Drop force of map type for pinned default_state as by the time we
pin it, the map type is always WB and doesn't conflict with the earlier
use by ce->state.
v4: Transfer engine->default_state from MAP_WC to MAP_WB on creation so
we do not need the MAP_FORCE littered around the backends

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180914123504.2062-3-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/i915_perf.c
drivers/gpu/drm/i915/intel_lrc.c