ARM: OMAP5/DRA7: realtime_counter: Configure CNTFRQ register
authorR Sricharan <r.sricharan@ti.com>
Thu, 10 Oct 2013 07:43:48 +0000 (13:13 +0530)
committerTony Lindgren <tony@atomide.com>
Thu, 10 Oct 2013 17:14:22 +0000 (10:14 -0700)
commit5523e4092ee4f2ef58d00c78365c8bddf730c900
treeddca2e68a02c282bdf8034e08fcd7286f054b39b
parentaa2f4b16f8305f0bddb5731a222b0ce39e6844aa
ARM: OMAP5/DRA7: realtime_counter: Configure CNTFRQ register

The realtime counter called master counter, produces the count
used by the private timer peripherals in the MPU_CLUSTER. The
CNTFRQ per cpu register is used to denote the frequency of the counter.
Currently the frequency value is passed from the
DT file, but this is not scalable when we have other non-DT guest
OS. This register must be set to the right value by the
secure rom code. Setting this register helps in propagating the right
frequency value across OSes.

More discussions and the reason for adding this in a non-DT
way can be seen from below.
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg93832.html

So configuring this secure register for all the cpus here.

Cc: Nishanth Menon <nm@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/omap-secure.h
arch/arm/mach-omap2/omap-smp.c
arch/arm/mach-omap2/timer.c