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(parent: 4fa88cd) | patch
phy: Renesas R-Car gen3 PCIe PHY driver
authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Sun, 10 Jun 2018 18:24:13 +0000 (21:24 +0300)
committerKishon Vijay Abraham I <kishon@ti.com>
Tue, 10 Jul 2018 08:15:11 +0000 (13:45 +0530)
commit2ce7f2f425ef7464a2a9a872d2e9acad49e6cb3e
tree52f244f66f7d5fa0d8d43704fd044c5b65bed63atree
parent4fa88cd3370ed33119863747a4db7f5e3f1dc308commit | diff
phy: Renesas R-Car gen3 PCIe PHY driver

This PHY is  still  mostly undocumented -- the only documented registers
exist on R-Car V3H (R8A77980) SoC where this PHY stays in a powered-down
state after a reset and thus  we  must power it up for PCIe to work...

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
drivers/phy/renesas/Kconfig diff | blob | history
drivers/phy/renesas/Makefile diff | blob | history
drivers/phy/renesas/phy-rcar-gen3-pcie.c [new file with mode: 0644] blob
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