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drm/i915: Document BDW+ DRRS M/N programming requirements
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 28 Jan 2022 10:37:57 +0000 (12:37 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 1 Feb 2022 09:33:23 +0000 (11:33 +0200)
commit19d36cfafad0395d1b8a9db7a85d64282c42ae94
treedd8d6c9368620ea6297f5bd0de19ffb293edc6e3tree
parent2efb4adf489dd29526c412c4593d12e08076c68acommit | diff
drm/i915: Document BDW+ DRRS M/N programming requirements

When reprogramming M/N live on BDW+ we must write the LINK_N
register last as it's the one that arms the double buffered
register update for all the M/N registers. Document this so
that we don't accidentally break things.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220128103757.22461-18-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_display.c diff | blob | history
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