drm/msm: add mdp5/apq8x74
authorRob Clark <robdclark@gmail.com>
Sat, 30 Nov 2013 22:51:47 +0000 (17:51 -0500)
committerRob Clark <robdclark@gmail.com>
Thu, 9 Jan 2014 19:44:06 +0000 (14:44 -0500)
commit06c0dd96bfbba8a9368ffd7c4b12d3bfed37001d
tree806d07197b4fd3ab0d73885329f7de1d890f22d6
parentdada25bd22a52a4351357209a8c227070cfd406d
drm/msm: add mdp5/apq8x74

Add support for the new MDP5 display controller block.  The mapping
between parts of the display controller and KMS is:

  plane   -> PIPE{RGBn,VIGn}             \
  crtc    -> LM (layer mixer)            |-> MDP "device"
  encoder -> INTF                        /
  connector -> HDMI/DSI/eDP/etc          --> other device(s)

Unlike MDP4, it appears we can get by with a single encoder, rather
than needing a different implementation for DTV, DSI, etc.  (Ie. the
register interface is same, just different bases.)

Also unlike MDP4, all the IRQs for other blocks (HDMI, DSI, etc) are
routed through MDP.

And finally, MDP5 has this "Shared Memory Pool" (called "SMP"), from
which blocks need to be allocated to the active pipes based on fetch
stride.

Signed-off-by: Rob Clark <robdclark@gmail.com>
12 files changed:
drivers/gpu/drm/msm/Makefile
drivers/gpu/drm/msm/NOTES
drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c [new file with mode: 0644]
drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c [new file with mode: 0644]
drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c [new file with mode: 0644]
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c [new file with mode: 0644]
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h [new file with mode: 0644]
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c [new file with mode: 0644]
drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.c [new file with mode: 0644]
drivers/gpu/drm/msm/mdp/mdp5/mdp5_smp.h [new file with mode: 0644]
drivers/gpu/drm/msm/msm_drv.c
drivers/gpu/drm/msm/msm_kms.h