Merge branches 'x86/urgent', 'x86/amd-iommu', 'x86/apic', 'x86/cleanups', 'x86/core...
[sfrench/cifs-2.6.git] / drivers / net / cxgb3 / cxgb3_ctl_defs.h
index 2095ddacff786902b1b0b6d8fb1389cb4231d5f0..6ad92405d9a034268796aafb7ece1540aa37c6bc 100644 (file)
 #define _CXGB3_OFFLOAD_CTL_DEFS_H
 
 enum {
-       GET_MAX_OUTSTANDING_WR,
-       GET_TX_MAX_CHUNK,
-       GET_TID_RANGE,
-       GET_STID_RANGE,
-       GET_RTBL_RANGE,
-       GET_L2T_CAPACITY,
-       GET_MTUS,
-       GET_WR_LEN,
-       GET_IFF_FROM_MAC,
-       GET_DDP_PARAMS,
-       GET_PORTS,
-
-       ULP_ISCSI_GET_PARAMS,
-       ULP_ISCSI_SET_PARAMS,
-
-       RDMA_GET_PARAMS,
-       RDMA_CQ_OP,
-       RDMA_CQ_SETUP,
-       RDMA_CQ_DISABLE,
-       RDMA_CTRL_QP_SETUP,
-       RDMA_GET_MEM,
+       GET_MAX_OUTSTANDING_WR  = 0,
+       GET_TX_MAX_CHUNK        = 1,
+       GET_TID_RANGE           = 2,
+       GET_STID_RANGE          = 3,
+       GET_RTBL_RANGE          = 4,
+       GET_L2T_CAPACITY        = 5,
+       GET_MTUS                = 6,
+       GET_WR_LEN              = 7,
+       GET_IFF_FROM_MAC        = 8,
+       GET_DDP_PARAMS          = 9,
+       GET_PORTS               = 10,
+
+       ULP_ISCSI_GET_PARAMS    = 11,
+       ULP_ISCSI_SET_PARAMS    = 12,
+
+       RDMA_GET_PARAMS         = 13,
+       RDMA_CQ_OP              = 14,
+       RDMA_CQ_SETUP           = 15,
+       RDMA_CQ_DISABLE         = 16,
+       RDMA_CTRL_QP_SETUP      = 17,
+       RDMA_GET_MEM            = 18,
+       RDMA_GET_MIB            = 19,
+
+       GET_RX_PAGE_INFO        = 50,
 };
 
 /*
@@ -108,10 +111,7 @@ struct ulp_iscsi_info {
        unsigned int llimit;
        unsigned int ulimit;
        unsigned int tagmask;
-       unsigned int pgsz3;
-       unsigned int pgsz2;
-       unsigned int pgsz1;
-       unsigned int pgsz0;
+       u8 pgsz_factor[4];
        unsigned int max_rxsz;
        unsigned int max_txsz;
        struct pci_dev *pdev;
@@ -161,4 +161,12 @@ struct rdma_ctrlqp_setup {
        unsigned long long base_addr;
        unsigned int size;
 };
+
+/*
+ * Offload TX/RX page information.
+ */
+struct ofld_page_info {
+       unsigned int page_size;  /* Page size, should be a power of 2 */
+       unsigned int num;        /* Number of pages */
+};
 #endif                         /* _CXGB3_OFFLOAD_CTL_DEFS_H */