* This is the generic MTD driver for NAND flash devices. It should be
* capable of working with almost all NAND chips currently available.
* Basic support for AG-AND chips is provided.
- *
+ *
* Additional technical information is available on
* http://www.linux-mtd.infradead.org/tech/nand.html
- *
+ *
* Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
* 2002 Thomas Gleixner (tglx@linutronix.de)
*
- * 02-08-2004 tglx: support for strange chips, which cannot auto increment
+ * 02-08-2004 tglx: support for strange chips, which cannot auto increment
* pages on read / read_oob
*
* 03-17-2004 tglx: Check ready before auto increment check. Simon Bayes
* Make reads over block boundaries work too
*
* 04-14-2004 tglx: first working version for 2k page size chips
- *
+ *
* 05-19-2004 tglx: Basic support for Renesas AG-AND chips
*
* 09-24-2004 tglx: add support for hardware controllers (e.g. ECC) shared
*
* 12-05-2004 dmarlin: add workaround for Renesas AG-AND chips "disturb" issue.
* Basically, any block not rewritten may lose data when surrounding blocks
- * are rewritten many times. JFFS2 ensures this doesn't happen for blocks
+ * are rewritten many times. JFFS2 ensures this doesn't happen for blocks
* it uses, but the Bad Block Table(s) may not be rewritten. To ensure they
* do not lose data, force them to be rewritten when some of the surrounding
- * blocks are erased. Rather than tracking a specific nearby block (which
- * could itself go bad), use a page address 'mask' to select several blocks
+ * blocks are erased. Rather than tracking a specific nearby block (which
+ * could itself go bad), use a page address 'mask' to select several blocks
* in the same area, and rewrite the BBT when any of them are erased.
*
- * 01-03-2005 dmarlin: added support for the device recovery command sequence for Renesas
+ * 01-03-2005 dmarlin: added support for the device recovery command sequence for Renesas
* AG-AND chips. If there was a sudden loss of power during an erase operation,
* a "device recovery" operation must be performed when power is restored
* to ensure correct operation.
*
- * 01-20-2005 dmarlin: added support for optional hardware specific callback routine to
+ * 01-20-2005 dmarlin: added support for optional hardware specific callback routine to
* perform extra error status checks on erase and write failures. This required
* adding a wrapper function for nand_read_ecc.
*
* 08-20-2005 vwool: suspend/resume added
*
* Credits:
- * David Woodhouse for adding multichip support
- *
+ * David Woodhouse for adding multichip support
+ *
* Aleph One Ltd. and Toby Churchill Ltd. for supporting the
* rework for 2K page size chips
*
.useecc = MTD_NANDECC_AUTOPLACE,
.eccbytes = 24,
.eccpos = {
- 40, 41, 42, 43, 44, 45, 46, 47,
- 48, 49, 50, 51, 52, 53, 54, 55,
+ 40, 41, 42, 43, 44, 45, 46, 47,
+ 48, 49, 50, 51, 52, 53, 54, 55,
56, 57, 58, 59, 60, 61, 62, 63},
.oobfree = { {2, 38} }
};
static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page, u_char *oob_buf,
struct nand_oobinfo *oobsel, int mode);
#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
-static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
+static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode);
#else
#define nand_verify_pages(...) (0)
#endif
-
+
static int nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state);
/**
* nand_release_device - [GENERIC] release chip
* @mtd: MTD device structure
- *
- * Deselect, release chip lock and wake up anyone waiting on the device
+ *
+ * Deselect, release chip lock and wake up anyone waiting on the device
*/
static void nand_release_device (struct mtd_info *mtd)
{
* nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
* @mtd: MTD device structure
*
- * Default read function for 16bit buswith with
+ * Default read function for 16bit buswith with
* endianess conversion
*/
static u_char nand_read_byte16(struct mtd_info *mtd)
* nand_read_word - [DEFAULT] read one word from the chip
* @mtd: MTD device structure
*
- * Default read function for 16bit buswith without
+ * Default read function for 16bit buswith without
* endianess conversion
*/
static u16 nand_read_word(struct mtd_info *mtd)
* @mtd: MTD device structure
* @word: data word to write
*
- * Default write function for 16bit buswith without
+ * Default write function for 16bit buswith without
* endianess conversion
*/
static void nand_write_word(struct mtd_info *mtd, u16 word)
struct nand_chip *this = mtd->priv;
switch(chip) {
case -1:
- this->hwcontrol(mtd, NAND_CTL_CLRNCE);
+ this->hwcontrol(mtd, NAND_CTL_CLRNCE);
break;
case 0:
this->hwcontrol(mtd, NAND_CTL_SETNCE);
}
/**
- * nand_read_buf - [DEFAULT] read chip data into buffer
+ * nand_read_buf - [DEFAULT] read chip data into buffer
* @mtd: MTD device structure
* @buf: buffer to store date
* @len: number of bytes to read
}
/**
- * nand_verify_buf - [DEFAULT] Verify chip data against buffer
+ * nand_verify_buf - [DEFAULT] Verify chip data against buffer
* @mtd: MTD device structure
* @buf: buffer containing the data to compare
* @len: number of bytes to compare
struct nand_chip *this = mtd->priv;
u16 *p = (u16 *) buf;
len >>= 1;
-
+
for (i=0; i<len; i++)
writew(p[i], this->IO_ADDR_W);
-
+
}
/**
- * nand_read_buf16 - [DEFAULT] read chip data into buffer
+ * nand_read_buf16 - [DEFAULT] read chip data into buffer
* @mtd: MTD device structure
* @buf: buffer to store date
* @len: number of bytes to read
}
/**
- * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
+ * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
* @mtd: MTD device structure
* @buf: buffer containing the data to compare
* @len: number of bytes to compare
* @ofs: offset from device start
* @getchip: 0, if the chip is already selected
*
- * Check, if the block is bad.
+ * Check, if the block is bad.
*/
static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
{
/* Select the NAND device */
this->select_chip(mtd, chipnr);
- } else
- page = (int) ofs;
+ } else
+ page = (int) ofs;
if (this->options & NAND_BUSWIDTH_16) {
this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos & 0xFE, page & this->pagemask);
if (this->read_byte(mtd) != 0xff)
res = 1;
}
-
+
if (getchip) {
/* Deselect and wake up anyone waiting on the device */
nand_release_device(mtd);
- }
-
+ }
+
return res;
}
u_char buf[2] = {0, 0};
size_t retlen;
int block;
-
+
/* Get block number */
block = ((int) ofs) >> this->bbt_erase_shift;
if (this->bbt)
/* Do we have a flash based bad block table ? */
if (this->options & NAND_USE_FLASH_BBT)
return nand_update_bbt (mtd, ofs);
-
+
/* We write two bytes, so we dont have to mess with 16 bit access */
ofs += mtd->oobsize + (this->badblockpos & ~0x01);
return nand_write_oob (mtd, ofs , 2, &retlen, buf);
}
-/**
+/**
* nand_check_wp - [GENERIC] check if the chip is write protected
* @mtd: MTD device structure
- * Check, if the device is write protected
+ * Check, if the device is write protected
*
- * The function expects, that the device is already selected
+ * The function expects, that the device is already selected
*/
static int nand_check_wp (struct mtd_info *mtd)
{
struct nand_chip *this = mtd->priv;
/* Check the WP bit */
this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
- return (this->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
+ return (this->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
}
/**
static int nand_block_checkbad (struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
{
struct nand_chip *this = mtd->priv;
-
+
if (!this->bbt)
return this->block_bad(mtd, ofs, getchip);
-
+
/* Return info from the table */
return nand_isbad_bbt (mtd, ofs, allowbbt);
}
-/*
+/*
* Wait for the ready pin, after a command
* The timeout is catched later.
*/
if (this->dev_ready(mtd))
return;
touch_softlockup_watchdog();
- } while (time_before(jiffies, timeo));
+ } while (time_before(jiffies, timeo));
}
/**
/* Latch in address */
this->hwcontrol(mtd, NAND_CTL_CLRALE);
}
-
- /*
- * program and erase have their own busy handlers
+
+ /*
+ * program and erase have their own busy handlers
* status and sequential in needs no delay
*/
switch (command) {
-
+
case NAND_CMD_PAGEPROG:
case NAND_CMD_ERASE1:
case NAND_CMD_ERASE2:
return;
case NAND_CMD_RESET:
- if (this->dev_ready)
+ if (this->dev_ready)
break;
udelay(this->chip_delay);
this->hwcontrol(mtd, NAND_CTL_SETCLE);
while ( !(this->read_byte(mtd) & NAND_STATUS_READY));
return;
- /* This applies to read commands */
+ /* This applies to read commands */
default:
- /*
+ /*
* If we don't have access to the busy pin, we apply the given
* command delay
*/
if (!this->dev_ready) {
udelay (this->chip_delay);
return;
- }
+ }
}
/* Apply this short delay always to ensure that we do wait tWB in
* any case on any machine. */
column += mtd->oobblock;
command = NAND_CMD_READ0;
}
-
-
+
+
/* Begin command latch cycle */
this->hwcontrol(mtd, NAND_CTL_SETCLE);
/* Write out the command to the device. */
column >>= 1;
this->write_byte(mtd, column & 0xff);
this->write_byte(mtd, column >> 8);
- }
+ }
if (page_addr != -1) {
this->write_byte(mtd, (unsigned char) (page_addr & 0xff));
this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff));
/* Latch in address */
this->hwcontrol(mtd, NAND_CTL_CLRALE);
}
-
- /*
- * program and erase have their own busy handlers
+
+ /*
+ * program and erase have their own busy handlers
* status, sequential in, and deplete1 need no delay
*/
switch (command) {
-
+
case NAND_CMD_CACHEDPROG:
case NAND_CMD_PAGEPROG:
case NAND_CMD_ERASE1:
case NAND_CMD_DEPLETE1:
return;
- /*
+ /*
* read error status commands require only a short delay
*/
case NAND_CMD_STATUS_ERROR:
return;
case NAND_CMD_RESET:
- if (this->dev_ready)
+ if (this->dev_ready)
break;
udelay(this->chip_delay);
this->hwcontrol(mtd, NAND_CTL_SETCLE);
/* End command latch cycle */
this->hwcontrol(mtd, NAND_CTL_CLRCLE);
/* Fall through into ready check */
-
- /* This applies to read commands */
+
+ /* This applies to read commands */
default:
- /*
+ /*
* If we don't have access to the busy pin, we apply the given
* command delay
*/
if (!this->dev_ready) {
udelay (this->chip_delay);
return;
- }
+ }
}
/* Apply this short delay always to ensure that we do wait tWB in
* nand_get_device - [GENERIC] Get chip for selected access
* @this: the nand chip descriptor
* @mtd: MTD device structure
- * @new_state: the state which is requested
+ * @new_state: the state which is requested
*
* Get the device and lock it for exclusive access
*/
* @state: state to select the max. timeout value
*
* Wait for command done. This applies to erase and program only
- * Erase can take up to 400ms and program up to 20ms according to
+ * Erase can take up to 400ms and program up to 20ms according to
* general NAND and SmartMedia specs
*
*/
unsigned long timeo = jiffies;
int status;
-
+
if (state == FL_ERASING)
timeo += (HZ * 400) / 1000;
else
if ((state == FL_ERASING) && (this->options & NAND_IS_AND))
this->cmdfunc (mtd, NAND_CMD_STATUS_MULTI, -1, -1);
- else
+ else
this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
- while (time_before(jiffies, timeo)) {
+ while (time_before(jiffies, timeo)) {
/* Check, if we were interrupted */
if (this->state != state)
return 0;
if (this->dev_ready) {
if (this->dev_ready(mtd))
- break;
+ break;
} else {
if (this->read_byte(mtd) & NAND_STATUS_READY)
break;
*
* Cached programming is not supported yet.
*/
-static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page,
+static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page,
u_char *oob_buf, struct nand_oobinfo *oobsel, int cached)
{
int i, status;
int *oob_config = oobsel->eccpos;
int datidx = 0, eccidx = 0, eccsteps = this->eccsteps;
int eccbytes = 0;
-
+
/* FIXME: Enable cached programming */
cached = 0;
-
+
/* Send command to begin auto page programming */
this->cmdfunc (mtd, NAND_CMD_SEQIN, 0x00, page);
printk (KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n");
this->write_buf(mtd, this->data_poi, mtd->oobblock);
break;
-
+
/* Software ecc 3/256, write all */
case NAND_ECC_SOFT:
for (; eccsteps; eccsteps--) {
}
break;
}
-
+
/* Write out OOB data */
if (this->options & NAND_HWECC_SYNDROME)
this->write_buf(mtd, &oob_buf[oobsel->eccbytes], mtd->oobsize - oobsel->eccbytes);
- else
+ else
this->write_buf(mtd, oob_buf, mtd->oobsize);
/* Send command to actually program the data */
/* wait until cache is ready*/
// status = this->waitfunc (mtd, this, FL_CACHEDRPG);
}
- return 0;
+ return 0;
}
#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
* @oobmode: 1 = full buffer verify, 0 = ecc only
*
* The NAND device assumes that it is always writing to a cleanly erased page.
- * Hence, it performs its internal write verification only on bits that
+ * Hence, it performs its internal write verification only on bits that
* transitioned from 1 to 0. The device does NOT verify the whole page on a
- * byte by byte basis. It is possible that the page was not completely erased
- * or the page is becoming unusable due to wear. The read with ECC would catch
- * the error later when the ECC page check fails, but we would rather catch
+ * byte by byte basis. It is possible that the page was not completely erased
+ * or the page is becoming unusable due to wear. The read with ECC would catch
+ * the error later when the ECC page check fails, but we would rather catch
* it early in the page write stage. Better to write no data than invalid data.
*/
-static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
+static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode)
{
int i, j, datidx = 0, oobofs = 0, res = -EIO;
int eccsteps = this->eccsteps;
- int hweccbytes;
+ int hweccbytes;
u_char oobdata[64];
hweccbytes = (this->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0;
if (oobsel->useecc != MTD_NANDECC_OFF && !hweccbytes) {
int ecccnt = oobsel->eccbytes;
-
+
for (i = 0; i < ecccnt; i++) {
int idx = oobsel->eccpos[i];
if (oobdata[idx] != oob_buf[oobofs + idx] ) {
goto out;
}
}
- }
+ }
}
oobofs += mtd->oobsize - hweccbytes * eccsteps;
page++;
numpages--;
- /* Apply delay or wait for ready/busy pin
+ /* Apply delay or wait for ready/busy pin
* Do this before the AUTOINCR check, so no problems
* arise if a chip which does auto increment
* is marked as NOAUTOINCR by the board driver.
* Do this also before returning, so the chip is
* ready for the next command.
*/
- if (!this->dev_ready)
+ if (!this->dev_ready)
udelay (this->chip_delay);
else
nand_wait_ready(mtd);
/* All done, return happy */
if (!numpages)
return 0;
-
-
- /* Check, if the chip supports auto page increment */
+
+
+ /* Check, if the chip supports auto page increment */
if (!NAND_CANAUTOINCR(this))
this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
}
- /*
+ /*
* Terminate the read command. We come here in case of an error
* So we must issue a reset command.
*/
-out:
+out:
this->cmdfunc (mtd, NAND_CMD_RESET, -1, -1);
return res;
}
* NAND read with ECC
*/
int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
- size_t * retlen, u_char * buf, u_char * oob_buf,
+ size_t * retlen, u_char * buf, u_char * oob_buf,
struct nand_oobinfo *oobsel, int flags)
{
/* Autoplace of oob data ? Use the default placement scheme */
if (oobsel->useecc == MTD_NANDECC_AUTOPLACE)
oobsel = this->autooob;
-
+
eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
oob_config = oobsel->eccpos;
end = mtd->oobblock;
ecc = this->eccsize;
eccbytes = this->eccbytes;
-
+
if ((eccmode == NAND_ECC_NONE) || (this->options & NAND_HWECC_SYNDROME))
compareecc = 0;
oobreadlen = mtd->oobsize;
- if (this->options & NAND_HWECC_SYNDROME)
+ if (this->options & NAND_HWECC_SYNDROME)
oobreadlen -= oobsel->eccbytes;
/* Loop until all data read */
while (read < len) {
-
+
int aligned = (!col && (len - read) >= end);
- /*
+ /*
* If the read is not page aligned, we have to read into data buffer
* due to ecc, else we read into return buffer direct
*/
if (aligned)
data_poi = &buf[read];
- else
+ else
data_poi = this->data_buf;
-
- /* Check, if we have this page in the buffer
+
+ /* Check, if we have this page in the buffer
*
* FIXME: Make it work when we must provide oob data too,
* check the usage of data_buf oob field
if (sndcmd) {
this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
sndcmd = 0;
- }
+ }
/* get oob area, if we have no oob buffer from fs-driver */
if (!oob_buf || oobsel->useecc == MTD_NANDECC_AUTOPLACE ||
oob_data = &this->data_buf[end];
eccsteps = this->eccsteps;
-
+
switch (eccmode) {
case NAND_ECC_NONE: { /* No ECC, Read in a page */
static unsigned long lastwhinge = 0;
this->read_buf(mtd, data_poi, end);
break;
}
-
+
case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */
this->read_buf(mtd, data_poi, end);
- for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=3, datidx += ecc)
+ for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=3, datidx += ecc)
this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
- break;
+ break;
default:
for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=eccbytes, datidx += ecc) {
* does the error correction on the fly */
ecc_status = this->correct_data(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]);
if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
- DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: "
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: "
"Failed ECC read, page 0x%08x on chip %d\n", page, chipnr);
ecc_failed++;
}
} else {
this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
- }
+ }
}
- break;
+ break;
}
/* read oobdata */
/* Skip ECC check, if not requested (ECC_NONE or HW_ECC with syndromes) */
if (!compareecc)
- goto readoob;
-
+ goto readoob;
+
/* Pick the ECC bytes out of the oob data */
for (j = 0; j < oobsel->eccbytes; j++)
ecc_code[j] = oob_data[oob_config[j]];
/* correct data, if neccecary */
for (i = 0, j = 0, datidx = 0; i < this->eccsteps; i++, datidx += ecc) {
ecc_status = this->correct_data(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]);
-
+
/* Get next chunk of ecc bytes */
j += eccbytes;
-
- /* Check, if we have a fs supplied oob-buffer,
+
+ /* Check, if we have a fs supplied oob-buffer,
* This is the legacy mode. Used by YAFFS1
* Should go away some day
*/
- if (oob_buf && oobsel->useecc == MTD_NANDECC_PLACE) {
+ if (oob_buf && oobsel->useecc == MTD_NANDECC_PLACE) {
int *p = (int *)(&oob_data[mtd->oobsize]);
p[i] = ecc_status;
}
-
- if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
+
+ if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
ecc_failed++;
}
- }
+ }
readoob:
/* check, if we have a fs supplied oob-buffer */
}
readdata:
/* Partial page read, transfer data into fs buffer */
- if (!aligned) {
+ if (!aligned) {
for (j = col; j < end && read < len; j++)
buf[read++] = data_poi[j];
- this->pagebuf = realpage;
- } else
+ this->pagebuf = realpage;
+ } else
read += mtd->oobblock;
- /* Apply delay or wait for ready/busy pin
+ /* Apply delay or wait for ready/busy pin
* Do this before the AUTOINCR check, so no problems
* arise if a chip which does auto increment
* is marked as NOAUTOINCR by the board driver.
*/
- if (!this->dev_ready)
+ if (!this->dev_ready)
udelay (this->chip_delay);
else
nand_wait_ready(mtd);
-
+
if (read == len)
- break;
+ break;
/* For subsequent reads align to page boundary. */
col = 0;
this->select_chip(mtd, -1);
this->select_chip(mtd, chipnr);
}
- /* Check, if the chip supports auto page increment
- * or if we have hit a block boundary.
- */
+ /* Check, if the chip supports auto page increment
+ * or if we have hit a block boundary.
+ */
if (!NAND_CANAUTOINCR(this) || !(page & blockcheck))
- sndcmd = 1;
+ sndcmd = 1;
}
/* Deselect and wake up anyone waiting on the device */
/* Shift to get page */
page = (int)(from >> this->page_shift);
chipnr = (int)(from >> this->chip_shift);
-
+
/* Mask to get column */
col = from & (mtd->oobsize - 1);
/* Send the read command */
this->cmdfunc (mtd, NAND_CMD_READOOB, col, page & this->pagemask);
- /*
+ /*
* Read the data, if we read more than one page
* oob data, let the device transfer the data !
*/
this->select_chip(mtd, -1);
this->select_chip(mtd, chipnr);
}
-
- /* Apply delay or wait for ready/busy pin
+
+ /* Apply delay or wait for ready/busy pin
* Do this before the AUTOINCR check, so no problems
* arise if a chip which does auto increment
* is marked as NOAUTOINCR by the board driver.
*/
- if (!this->dev_ready)
+ if (!this->dev_ready)
udelay (this->chip_delay);
else
nand_wait_ready(mtd);
- /* Check, if the chip supports auto page increment
- * or if we have hit a block boundary.
- */
+ /* Check, if the chip supports auto page increment
+ * or if we have hit a block boundary.
+ */
if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) {
/* For subsequent page reads set offset to 0 */
this->cmdfunc (mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask);
nand_get_device (this, mtd , FL_READING);
this->select_chip (mtd, chip);
-
+
/* Add requested oob length */
len += ooblen;
-
+
while (len) {
if (sndcmd)
this->cmdfunc (mtd, NAND_CMD_READ0, 0, page & this->pagemask);
- sndcmd = 0;
+ sndcmd = 0;
this->read_buf (mtd, &buf[cnt], pagesize);
len -= pagesize;
cnt += pagesize;
page++;
-
- if (!this->dev_ready)
+
+ if (!this->dev_ready)
udelay (this->chip_delay);
else
nand_wait_ready(mtd);
-
- /* Check, if the chip supports auto page increment */
+
+ /* Check, if the chip supports auto page increment */
if (!NAND_CANAUTOINCR(this) || !(page & blockcheck))
sndcmd = 1;
}
}
-/**
- * nand_prepare_oobbuf - [GENERIC] Prepare the out of band buffer
+/**
+ * nand_prepare_oobbuf - [GENERIC] Prepare the out of band buffer
* @mtd: MTD device structure
* @fsbuf: buffer given by fs driver
* @oobsel: out of band selection structre
int i, len, ofs;
/* Zero copy fs supplied buffer */
- if (fsbuf && !autoplace)
+ if (fsbuf && !autoplace)
return fsbuf;
/* Check, if the buffer must be filled with ff again */
- if (this->oobdirty) {
- memset (this->oob_buf, 0xff,
+ if (this->oobdirty) {
+ memset (this->oob_buf, 0xff,
mtd->oobsize << (this->phys_erase_shift - this->page_shift));
this->oobdirty = 0;
- }
-
+ }
+
/* If we have no autoplacement or no fs buffer use the internal one */
if (!autoplace || !fsbuf)
return this->oob_buf;
-
+
/* Walk through the pages and place the data */
this->oobdirty = 1;
ofs = 0;
{
return (nand_write_ecc (mtd, to, len, retlen, buf, NULL, NULL));
}
-
+
/**
* nand_write_ecc - [MTD Interface] NAND write with ECC
* @mtd: MTD device structure
return -EINVAL;
}
- /* reject writes, which are not page aligned */
+ /* reject writes, which are not page aligned */
if (NOTALIGNED (to) || NOTALIGNED(len)) {
printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
return -EINVAL;
goto out;
/* if oobsel is NULL, use chip defaults */
- if (oobsel == NULL)
- oobsel = &mtd->oobinfo;
-
+ if (oobsel == NULL)
+ oobsel = &mtd->oobinfo;
+
/* Autoplace of oob data ? Use the default placement scheme */
if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
oobsel = this->autooob;
autoplace = 1;
- }
+ }
if (oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
autoplace = 1;
totalpages = len >> this->page_shift;
page = (int) (to >> this->page_shift);
/* Invalidate the page cache, if we write to the cached page */
- if (page <= this->pagebuf && this->pagebuf < (page + totalpages))
+ if (page <= this->pagebuf && this->pagebuf < (page + totalpages))
this->pagebuf = -1;
-
+
/* Set it relative to chip */
page &= this->pagemask;
startpage = page;
if (ret) {
DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: write_page failed %d\n", ret);
goto out;
- }
+ }
/* Next oob page */
oob += mtd->oobsize;
/* Update written bytes count */
written += mtd->oobblock;
- if (written == len)
+ if (written == len)
goto cmp;
-
+
/* Increment page address */
page++;
if (!(page & (ppblock - 1))){
int ofs;
this->data_poi = bufstart;
- ret = nand_verify_pages (mtd, this, startpage,
+ ret = nand_verify_pages (mtd, this, startpage,
page - startpage,
oobbuf, oobsel, chipnr, (eccbuf != NULL));
if (ret) {
DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
goto out;
- }
+ }
*retlen = written;
ofs = autoplace ? mtd->oobavail : mtd->oobsize;
numpages = min (totalpages, ppblock);
page &= this->pagemask;
startpage = page;
- oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel,
+ oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel,
autoplace, numpages);
oob = 0;
/* Check, if we cross a chip boundary */
oobbuf, oobsel, chipnr, (eccbuf != NULL));
if (!ret)
*retlen = written;
- else
+ else
DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
out:
/* Check, if it is write protected */
if (nand_check_wp(mtd))
goto out;
-
+
/* Invalidate the page cache, if we write to the cached page */
if (page == this->pagebuf)
this->pagebuf = -1;
*
* NAND write with kvec. This just calls the ecc function
*/
-static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
+static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
loff_t to, size_t * retlen)
{
- return (nand_writev_ecc (mtd, vecs, count, to, retlen, NULL, NULL));
+ return (nand_writev_ecc (mtd, vecs, count, to, retlen, NULL, NULL));
}
/**
*
* NAND write with iovec with ecc
*/
-static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
+static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel)
{
int i, page, len, total_len, ret = -EIO, written = 0, chipnr;
return -EINVAL;
}
- /* reject writes, which are not page aligned */
+ /* reject writes, which are not page aligned */
if (NOTALIGNED (to) || NOTALIGNED(total_len)) {
printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
return -EINVAL;
goto out;
/* if oobsel is NULL, use chip defaults */
- if (oobsel == NULL)
- oobsel = &mtd->oobinfo;
+ if (oobsel == NULL)
+ oobsel = &mtd->oobinfo;
/* Autoplace of oob data ? Use the default placement scheme */
if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
oobsel = this->autooob;
autoplace = 1;
- }
+ }
if (oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
autoplace = 1;
/* Setup start page */
page = (int) (to >> this->page_shift);
/* Invalidate the page cache, if we write to the cached page */
- if (page <= this->pagebuf && this->pagebuf < ((to + total_len) >> this->page_shift))
+ if (page <= this->pagebuf && this->pagebuf < ((to + total_len) >> this->page_shift))
this->pagebuf = -1;
startpage = page & this->pagemask;
oob = 0;
for (i = 1; i <= numpages; i++) {
/* Write one page. If this is the last page to write
- * then use the real pageprogram command, else select
+ * then use the real pageprogram command, else select
* cached programming if supported by the chip.
*/
- ret = nand_write_page (mtd, this, page & this->pagemask,
+ ret = nand_write_page (mtd, this, page & this->pagemask,
&oobbuf[oob], oobsel, i != numpages);
if (ret)
goto out;
count--;
}
} else {
- /* We must use the internal buffer, read data out of each
+ /* We must use the internal buffer, read data out of each
* tuple until we have a full page to write
*/
int cnt = 0;
while (cnt < mtd->oobblock) {
- if (vecs->iov_base != NULL && vecs->iov_len)
+ if (vecs->iov_base != NULL && vecs->iov_len)
this->data_buf[cnt++] = ((u_char *) vecs->iov_base)[len++];
/* Check, if we have to switch to the next tuple */
if (len >= (int) vecs->iov_len) {
count--;
}
}
- this->pagebuf = page;
- this->data_poi = this->data_buf;
+ this->pagebuf = page;
+ this->data_poi = this->data_buf;
bufstart = this->data_poi;
- numpages = 1;
+ numpages = 1;
oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages);
ret = nand_write_page (mtd, this, page & this->pagemask,
oobbuf, oobsel, 0);
ret = nand_verify_pages (mtd, this, startpage, numpages, oobbuf, oobsel, chipnr, 0);
if (ret)
goto out;
-
+
written += mtd->oobblock * numpages;
/* All done ? */
if (!count)
{
return nand_erase_nand (mtd, instr, 0);
}
-
+
#define BBT_PAGE_MASK 0xffffff3f
/**
* nand_erase_intern - [NAND Interface] erase block(s)
instr->state = MTD_ERASE_FAILED;
goto erase_exit;
}
-
- /* Invalidate the page cache, if we erase the block which contains
+
+ /* Invalidate the page cache, if we erase the block which contains
the current cached page */
if (page <= this->pagebuf && this->pagebuf < (page + pages_per_block))
this->pagebuf = -1;
this->erase_cmd (mtd, page & this->pagemask);
-
+
status = this->waitfunc (mtd, this, FL_ERASING);
/* See if operation failed and additional status checks are available */
/* if BBT requires refresh, set the BBT rewrite flag to the page being erased */
if (this->options & BBT_AUTO_REFRESH) {
- if (((page & BBT_PAGE_MASK) == bbt_masked_page) &&
+ if (((page & BBT_PAGE_MASK) == bbt_masked_page) &&
(page != this->bbt_td->pages[chipnr])) {
rewrite_bbt[chipnr] = (page << this->page_shift);
}
}
-
+
/* Increment page address and decrement length */
len -= (1 << this->phys_erase_shift);
page += pages_per_block;
this->select_chip(mtd, -1);
this->select_chip(mtd, chipnr);
- /* if BBT requires refresh and BBT-PERCHIP,
+ /* if BBT requires refresh and BBT-PERCHIP,
* set the BBT page mask to see if this BBT should be rewritten */
if ((this->options & BBT_AUTO_REFRESH) && (this->bbt_td->options & NAND_BBT_PERCHIP)) {
bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
for (chipnr = 0; chipnr < this->numchips; chipnr++) {
if (rewrite_bbt[chipnr]) {
/* update the BBT for chip */
- DEBUG (MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt (%d:0x%0x 0x%0x)\n",
+ DEBUG (MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt (%d:0x%0x 0x%0x)\n",
chipnr, rewrite_bbt[chipnr], this->bbt_td->pages[chipnr]);
nand_update_bbt (mtd, rewrite_bbt[chipnr]);
}
static int nand_block_isbad (struct mtd_info *mtd, loff_t ofs)
{
/* Check for invalid offset */
- if (ofs > mtd->size)
+ if (ofs > mtd->size)
return -EINVAL;
-
+
return nand_block_checkbad (mtd, ofs, 1, 0);
}
/* Print and store flash device information */
for (i = 0; nand_flash_ids[i].name != NULL; i++) {
-
- if (nand_dev_id != nand_flash_ids[i].id)
+
+ if (nand_dev_id != nand_flash_ids[i].id)
continue;
if (!mtd->name) mtd->name = nand_flash_ids[i].name;
this->chipsize = nand_flash_ids[i].chipsize << 20;
-
+
/* New devices have all the information in additional id bytes */
if (!nand_flash_ids[i].pagesize) {
int extid;
extid >>= 2;
/* Get buswidth information */
busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
-
+
} else {
/* Old devices have this data hardcoded in the
* device id table */
* this correct ! */
if (busw != (this->options & NAND_BUSWIDTH_16)) {
printk (KERN_INFO "NAND device: Manufacturer ID:"
- " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
+ " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
nand_manuf_ids[maf_id].name , mtd->name);
- printk (KERN_WARNING
- "NAND bus width %d instead %d bit\n",
+ printk (KERN_WARNING
+ "NAND bus width %d instead %d bit\n",
(this->options & NAND_BUSWIDTH_16) ? 16 : 8,
busw ? 16 : 8);
this->select_chip(mtd, -1);
- return 1;
+ return 1;
}
-
- /* Calculate the address shift from the page size */
+
+ /* Calculate the address shift from the page size */
this->page_shift = ffs(mtd->oobblock) - 1;
this->bbt_erase_shift = this->phys_erase_shift = ffs(mtd->erasesize) - 1;
this->chip_shift = ffs(this->chipsize) - 1;
/* Set the bad block position */
- this->badblockpos = mtd->oobblock > 512 ?
+ this->badblockpos = mtd->oobblock > 512 ?
NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
/* Get chip options, preserve non chip based options */
this->options |= NAND_NO_AUTOINCR;
/* Check if this is a not a samsung device. Do not clear the options
* for chips which are not having an extended id.
- */
+ */
if (nand_maf_id != NAND_MFR_SAMSUNG && !nand_flash_ids[i].pagesize)
this->options &= ~NAND_SAMSUNG_LP_OPTIONS;
-
+
/* Check for AND chips with 4 page planes */
if (this->options & NAND_4PAGE_ARRAY)
this->erase_cmd = multi_erase_cmd;
/* Do not replace user supplied command function ! */
if (mtd->oobblock > 512 && this->cmdfunc == nand_command)
this->cmdfunc = nand_command_lp;
-
+
printk (KERN_INFO "NAND device: Manufacturer ID:"
- " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
+ " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
nand_manuf_ids[maf_id].name , nand_flash_ids[i].name);
break;
}
}
if (i > 1)
printk(KERN_INFO "%d NAND chips detected\n", i);
-
+
/* Allocate buffers, if neccecary */
if (!this->oob_buf) {
size_t len;
}
this->options |= NAND_OOBBUF_ALLOC;
}
-
+
if (!this->data_buf) {
size_t len;
len = mtd->oobblock + mtd->oobsize;
if (!this->autooob) {
/* Select the appropriate default oob placement scheme for
* placement agnostic filesystems */
- switch (mtd->oobsize) {
+ switch (mtd->oobsize) {
case 8:
this->autooob = &nand_oob_8;
break;
BUG();
}
}
-
+
/* The number of bytes available for the filesystem to place fs dependend
* oob data */
mtd->oobavail = 0;
for (i = 0; this->autooob->oobfree[i][1]; i++)
mtd->oobavail += this->autooob->oobfree[i][1];
- /*
+ /*
* check ECC mode, default to software
* if 3byte/512byte hardware ECC is selected and we have 256 byte pagesize
- * fallback to software ECC
+ * fallback to software ECC
*/
- this->eccsize = 256; /* set default eccsize */
+ this->eccsize = 256; /* set default eccsize */
this->eccbytes = 3;
switch (this->eccmode) {
this->eccsize = 2048;
break;
- case NAND_ECC_HW3_512:
- case NAND_ECC_HW6_512:
- case NAND_ECC_HW8_512:
+ case NAND_ECC_HW3_512:
+ case NAND_ECC_HW6_512:
+ case NAND_ECC_HW8_512:
if (mtd->oobblock == 256) {
printk (KERN_WARNING "512 byte HW ECC not possible on 256 Byte pagesize, fallback to SW ECC \n");
this->eccmode = NAND_ECC_SOFT;
this->calculate_ecc = nand_calculate_ecc;
this->correct_data = nand_correct_data;
- } else
+ } else
this->eccsize = 512; /* set eccsize to 512 */
break;
-
+
case NAND_ECC_HW3_256:
break;
-
- case NAND_ECC_NONE:
+
+ case NAND_ECC_NONE:
printk (KERN_WARNING "NAND_ECC_NONE selected by board driver. This is not recommended !!\n");
this->eccmode = NAND_ECC_NONE;
break;
- case NAND_ECC_SOFT:
+ case NAND_ECC_SOFT:
this->calculate_ecc = nand_calculate_ecc;
this->correct_data = nand_correct_data;
break;
default:
printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
- BUG();
- }
+ BUG();
+ }
- /* Check hardware ecc function availability and adjust number of ecc bytes per
+ /* Check hardware ecc function availability and adjust number of ecc bytes per
* calculation step
*/
switch (this->eccmode) {
case NAND_ECC_HW12_2048:
this->eccbytes += 4;
- case NAND_ECC_HW8_512:
+ case NAND_ECC_HW8_512:
this->eccbytes += 2;
- case NAND_ECC_HW6_512:
+ case NAND_ECC_HW6_512:
this->eccbytes += 3;
- case NAND_ECC_HW3_512:
+ case NAND_ECC_HW3_512:
case NAND_ECC_HW3_256:
if (this->calculate_ecc && this->correct_data && this->enable_hwecc)
break;
printk (KERN_WARNING "No ECC functions supplied, Hardware ECC not possible\n");
- BUG();
+ BUG();
}
-
+
mtd->eccsize = this->eccsize;
-
+
/* Set the number of read / write steps for one page to ensure ECC generation */
switch (this->eccmode) {
case NAND_ECC_HW12_2048:
this->eccsteps = mtd->oobblock / 512;
break;
case NAND_ECC_HW3_256:
- case NAND_ECC_SOFT:
+ case NAND_ECC_SOFT:
this->eccsteps = mtd->oobblock / 256;
break;
-
- case NAND_ECC_NONE:
+
+ case NAND_ECC_NONE:
this->eccsteps = 1;
break;
}
-
+
/* Initialize state, waitqueue and spinlock */
this->state = FL_READY;
init_waitqueue_head (&this->wq);
memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
mtd->owner = THIS_MODULE;
-
+
/* Check, if we should skip the bad block table scan */
if (this->options & NAND_SKIP_BBTSCAN)
return 0;
}
/**
- * nand_release - [NAND Interface] Free resources held by the NAND device
+ * nand_release - [NAND Interface] Free resources held by the NAND device
* @mtd: MTD device structure
*/
void nand_release (struct mtd_info *mtd)
git.samba.org / sfrench / cifs-2.6.git / blobdiff