Merge branches 'acpi-battery', 'acpi-video' and 'acpi-misc'
[sfrench/cifs-2.6.git] / drivers / mmc / host / sdhci-brcmstb.c
index f24623aac2dbecbad15920242e2417771d4e187c..8eb57de48e0c98a43c34ae9e47ef384ddb405fba 100644 (file)
 
 #define SDHCI_VENDOR 0x78
 #define  SDHCI_VENDOR_ENHANCED_STRB 0x1
+#define  SDHCI_VENDOR_GATE_SDCLK_EN 0x2
 
-#define BRCMSTB_PRIV_FLAGS_NO_64BIT            BIT(0)
-#define BRCMSTB_PRIV_FLAGS_BROKEN_TIMEOUT      BIT(1)
+#define BRCMSTB_MATCH_FLAGS_NO_64BIT           BIT(0)
+#define BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT     BIT(1)
+#define BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE     BIT(2)
+
+#define BRCMSTB_PRIV_FLAGS_HAS_CQE             BIT(0)
+#define BRCMSTB_PRIV_FLAGS_GATE_CLOCK          BIT(1)
 
 #define SDHCI_ARASAN_CQE_BASE_ADDR             0x200
 
 struct sdhci_brcmstb_priv {
        void __iomem *cfg_regs;
-       bool has_cqe;
+       unsigned int flags;
 };
 
 struct brcmstb_match_priv {
        void (*hs400es)(struct mmc_host *mmc, struct mmc_ios *ios);
        struct sdhci_ops *ops;
-       unsigned int flags;
+       const unsigned int flags;
 };
 
+static inline void enable_clock_gating(struct sdhci_host *host)
+{
+       u32 reg;
+
+       reg = sdhci_readl(host, SDHCI_VENDOR);
+       reg |= SDHCI_VENDOR_GATE_SDCLK_EN;
+       sdhci_writel(host, reg, SDHCI_VENDOR);
+}
+
+static void brcmstb_reset(struct sdhci_host *host, u8 mask)
+{
+       struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+       struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host);
+
+       sdhci_reset(host, mask);
+
+       /* Reset will clear this, so re-enable it */
+       if (priv->flags & BRCMSTB_PRIV_FLAGS_GATE_CLOCK)
+               enable_clock_gating(host);
+}
+
 static void sdhci_brcmstb_hs400es(struct mmc_host *mmc, struct mmc_ios *ios)
 {
        struct sdhci_host *host = mmc_priv(mmc);
@@ -129,22 +155,23 @@ static struct sdhci_ops sdhci_brcmstb_ops = {
 static struct sdhci_ops sdhci_brcmstb_ops_7216 = {
        .set_clock = sdhci_brcmstb_set_clock,
        .set_bus_width = sdhci_set_bus_width,
-       .reset = sdhci_reset,
+       .reset = brcmstb_reset,
        .set_uhs_signaling = sdhci_brcmstb_set_uhs_signaling,
 };
 
 static struct brcmstb_match_priv match_priv_7425 = {
-       .flags = BRCMSTB_PRIV_FLAGS_NO_64BIT |
-       BRCMSTB_PRIV_FLAGS_BROKEN_TIMEOUT,
+       .flags = BRCMSTB_MATCH_FLAGS_NO_64BIT |
+       BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT,
        .ops = &sdhci_brcmstb_ops,
 };
 
 static struct brcmstb_match_priv match_priv_7445 = {
-       .flags = BRCMSTB_PRIV_FLAGS_BROKEN_TIMEOUT,
+       .flags = BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT,
        .ops = &sdhci_brcmstb_ops,
 };
 
 static const struct brcmstb_match_priv match_priv_7216 = {
+       .flags = BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE,
        .hs400es = sdhci_brcmstb_hs400es,
        .ops = &sdhci_brcmstb_ops_7216,
 };
@@ -176,7 +203,7 @@ static int sdhci_brcmstb_add_host(struct sdhci_host *host,
        bool dma64;
        int ret;
 
-       if (!priv->has_cqe)
+       if ((priv->flags & BRCMSTB_PRIV_FLAGS_HAS_CQE) == 0)
                return sdhci_add_host(host);
 
        dev_dbg(mmc_dev(host->mmc), "CQE is enabled\n");
@@ -225,7 +252,6 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
        struct sdhci_brcmstb_priv *priv;
        struct sdhci_host *host;
        struct resource *iomem;
-       bool has_cqe = false;
        struct clk *clk;
        int res;
 
@@ -244,10 +270,6 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
                return res;
 
        memset(&brcmstb_pdata, 0, sizeof(brcmstb_pdata));
-       if (device_property_read_bool(&pdev->dev, "supports-cqe")) {
-               has_cqe = true;
-               match_priv->ops->irq = sdhci_brcmstb_cqhci_irq;
-       }
        brcmstb_pdata.ops = match_priv->ops;
        host = sdhci_pltfm_init(pdev, &brcmstb_pdata,
                                sizeof(struct sdhci_brcmstb_priv));
@@ -258,7 +280,10 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
 
        pltfm_host = sdhci_priv(host);
        priv = sdhci_pltfm_priv(pltfm_host);
-       priv->has_cqe = has_cqe;
+       if (device_property_read_bool(&pdev->dev, "supports-cqe")) {
+               priv->flags |= BRCMSTB_PRIV_FLAGS_HAS_CQE;
+               match_priv->ops->irq = sdhci_brcmstb_cqhci_irq;
+       }
 
        /* Map in the non-standard CFG registers */
        iomem = platform_get_resource(pdev, IORESOURCE_MEM, 1);
@@ -273,6 +298,14 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
        if (res)
                goto err;
 
+       /*
+        * Automatic clock gating does not work for SD cards that may
+        * voltage switch so only enable it for non-removable devices.
+        */
+       if ((match_priv->flags & BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE) &&
+           (host->mmc->caps & MMC_CAP_NONREMOVABLE))
+               priv->flags |= BRCMSTB_PRIV_FLAGS_GATE_CLOCK;
+
        /*
         * If the chip has enhanced strobe and it's enabled, add
         * callback
@@ -287,14 +320,14 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)
         * properties through mmc_of_parse().
         */
        host->caps = sdhci_readl(host, SDHCI_CAPABILITIES);
-       if (match_priv->flags & BRCMSTB_PRIV_FLAGS_NO_64BIT)
+       if (match_priv->flags & BRCMSTB_MATCH_FLAGS_NO_64BIT)
                host->caps &= ~SDHCI_CAN_64BIT;
        host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1);
        host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 |
                         SDHCI_SUPPORT_DDR50);
        host->quirks |= SDHCI_QUIRK_MISSING_CAPS;
 
-       if (match_priv->flags & BRCMSTB_PRIV_FLAGS_BROKEN_TIMEOUT)
+       if (match_priv->flags & BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT)
                host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
 
        res = sdhci_brcmstb_add_host(host, priv);