Merge tag 'drm-intel-gt-next-2023-04-06' of git://anongit.freedesktop.org/drm/drm...

[sfrench/cifs-2.6.git] / drivers / gpu / drm / i915 / i915_reg.h

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d22ffd7a32dc4961f1fdfab876dc4983d90de4d8..8dac20b0e7a723ba429b9c18ec221d10e93c59f6 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -928,8 +928,18 @@
 #define DG1_GSC_HECI2_BASE     0x00259000
 #define DG2_GSC_HECI1_BASE     0x00373000
 #define DG2_GSC_HECI2_BASE     0x00374000
-
-
+#define MTL_GSC_HECI1_BASE     0x00116000
+#define MTL_GSC_HECI2_BASE     0x00117000
+
+#define HECI_H_CSR(base)       _MMIO((base) + 0x4)
+#define   HECI_H_CSR_IE                REG_BIT(0)
+#define   HECI_H_CSR_IS                REG_BIT(1)
+#define   HECI_H_CSR_IG                REG_BIT(2)
+#define   HECI_H_CSR_RDY       REG_BIT(3)
+#define   HECI_H_CSR_RST       REG_BIT(4)
+
+#define HECI_H_GS1(base)       _MMIO((base) + 0xc4c)
+#define   HECI_H_GS1_ER_PREP   REG_BIT(0)
 
 #define HSW_GTT_CACHE_EN       _MMIO(0x4024)
 #define   GTT_CACHE_EN_ALL     0xF0007FFF