#ifndef _GVT_GTT_H_
#define _GVT_GTT_H_
-#define GTT_PAGE_SHIFT 12
-#define GTT_PAGE_SIZE (1UL << GTT_PAGE_SHIFT)
-#define GTT_PAGE_MASK (~(GTT_PAGE_SIZE-1))
+#define I915_GTT_PAGE_SHIFT 12
+#define I915_GTT_PAGE_MASK (~(I915_GTT_PAGE_SIZE - 1))
struct intel_vgpu_mm;
struct intel_vgpu *vgpu);
bool (*test_present)(struct intel_gvt_gtt_entry *e);
void (*clear_present)(struct intel_gvt_gtt_entry *e);
+ void (*set_present)(struct intel_gvt_gtt_entry *e);
bool (*test_pse)(struct intel_gvt_gtt_entry *e);
void (*set_pfn)(struct intel_gvt_gtt_entry *e, unsigned long pfn);
unsigned long (*get_pfn)(struct intel_gvt_gtt_entry *e);
struct list_head oos_page_free_list_head;
struct list_head mm_lru_list_head;
- struct page *scratch_ggtt_page;
- unsigned long scratch_ggtt_mfn;
+ struct page *scratch_page;
+ unsigned long scratch_mfn;
};
enum {
unsigned long page_mfn;
};
-
struct intel_vgpu_gtt {
struct intel_vgpu_mm *ggtt_mm;
unsigned long active_ppgtt_mm_bitmap;
struct list_head mm_list_head;
DECLARE_HASHTABLE(shadow_page_hash_table, INTEL_GVT_GTT_HASH_BITS);
- DECLARE_HASHTABLE(guest_page_hash_table, INTEL_GVT_GTT_HASH_BITS);
- atomic_t n_write_protected_guest_page;
+ DECLARE_HASHTABLE(tracked_guest_page_hash_table, INTEL_GVT_GTT_HASH_BITS);
+ atomic_t n_tracked_guest_page;
struct list_head oos_page_list_head;
struct list_head post_shadow_list_head;
struct intel_vgpu_scratch_pt scratch_pt[GTT_TYPE_MAX];
-
};
extern int intel_vgpu_init_gtt(struct intel_vgpu *vgpu);
unsigned long mfn;
};
-struct intel_vgpu_guest_page {
+struct intel_vgpu_page_track {
struct hlist_node node;
- bool writeprotection;
+ bool tracked;
unsigned long gfn;
int (*handler)(void *, u64, void *, int);
void *data;
+};
+
+struct intel_vgpu_guest_page {
+ struct intel_vgpu_page_track track;
unsigned long write_cnt;
struct intel_vgpu_oos_page *oos_page;
};
struct list_head list;
struct list_head vm_list;
int id;
- unsigned char mem[GTT_PAGE_SIZE];
+ unsigned char mem[I915_GTT_PAGE_SIZE];
};
#define GTT_ENTRY_NUM_IN_ONE_PAGE 512
struct list_head post_shadow_list;
};
-int intel_vgpu_init_guest_page(struct intel_vgpu *vgpu,
- struct intel_vgpu_guest_page *guest_page,
+int intel_vgpu_init_page_track(struct intel_vgpu *vgpu,
+ struct intel_vgpu_page_track *t,
unsigned long gfn,
int (*handler)(void *gp, u64, void *, int),
void *data);
-void intel_vgpu_clean_guest_page(struct intel_vgpu *vgpu,
- struct intel_vgpu_guest_page *guest_page);
-
-int intel_vgpu_set_guest_page_writeprotection(struct intel_vgpu *vgpu,
- struct intel_vgpu_guest_page *guest_page);
+void intel_vgpu_clean_page_track(struct intel_vgpu *vgpu,
+ struct intel_vgpu_page_track *t);
-void intel_vgpu_clear_guest_page_writeprotection(struct intel_vgpu *vgpu,
- struct intel_vgpu_guest_page *guest_page);
-
-struct intel_vgpu_guest_page *intel_vgpu_find_guest_page(
+struct intel_vgpu_page_track *intel_vgpu_find_tracked_page(
struct intel_vgpu *vgpu, unsigned long gfn);
int intel_vgpu_sync_oos_pages(struct intel_vgpu *vgpu);
int intel_vgpu_emulate_gtt_mmio_write(struct intel_vgpu *vgpu,
unsigned int off, void *p_data, unsigned int bytes);
+int intel_vgpu_write_protect_handler(struct intel_vgpu *vgpu, u64 pa,
+ void *p_data, unsigned int bytes);
+
#endif /* _GVT_GTT_H_ */