Merge tag 'amd-drm-next-6.7-2023-10-13' of https://gitlab.freedesktop.org/agd5f/linux...
[sfrench/cifs-2.6.git] / drivers / gpu / drm / amd / display / dc / link / protocols / link_edp_panel_control.c
index 98e715aa6d8e3468a0259cdae045aa66d923f68a..938df1f0f7dab038cdc467fd9b9f4e7ed375205e 100644 (file)
 #include "link_dp_capability.h"
 #include "dm_helpers.h"
 #include "dal_asic_id.h"
+#include "link_dp_phy.h"
 #include "dce/dmub_psr.h"
 #include "dc/dc_dmub_srv.h"
 #include "dce/dmub_replay.h"
 #include "abm.h"
+#define DC_LOGGER \
+       link->ctx->logger
 #define DC_LOGGER_INIT(logger)
 
 #define DP_SINK_PR_ENABLE_AND_CONFIGURATION            0x37B
@@ -299,6 +302,24 @@ bool set_cached_brightness_aux(struct dc_link *link)
                return set_default_brightness_aux(link);
        return false;
 }
+bool edp_is_ilr_optimization_enabled(struct dc_link *link)
+{
+       if (link->dpcd_caps.edp_supported_link_rates_count == 0 || !link->panel_config.ilr.optimize_edp_link_rate)
+               return false;
+       return true;
+}
+
+enum dc_link_rate get_max_link_rate_from_ilr_table(struct dc_link *link)
+{
+       enum dc_link_rate link_rate = link->reported_link_cap.link_rate;
+
+       for (int i = 0; i < link->dpcd_caps.edp_supported_link_rates_count; i++) {
+               if (link_rate < link->dpcd_caps.edp_supported_link_rates[i])
+                       link_rate = link->dpcd_caps.edp_supported_link_rates[i];
+       }
+
+       return link_rate;
+}
 
 bool edp_is_ilr_optimization_required(struct dc_link *link,
                struct dc_crtc_timing *crtc_timing)
@@ -311,8 +332,7 @@ bool edp_is_ilr_optimization_required(struct dc_link *link,
 
        ASSERT(link || crtc_timing); // invalid input
 
-       if (link->dpcd_caps.edp_supported_link_rates_count == 0 ||
-                       !link->panel_config.ilr.optimize_edp_link_rate)
+       if (!edp_is_ilr_optimization_enabled(link))
                return false;
 
 
@@ -362,6 +382,34 @@ void edp_panel_backlight_power_on(struct dc_link *link, bool wait_for_hpd)
                link->dc->hwss.edp_backlight_control(link, true);
 }
 
+void edp_set_panel_power(struct dc_link *link, bool powerOn)
+{
+       if (powerOn) {
+               // 1. panel VDD on
+               if (!link->dc->config.edp_no_power_sequencing)
+                       link->dc->hwss.edp_power_control(link, true);
+               link->dc->hwss.edp_wait_for_hpd_ready(link, true);
+
+               // 2. panel BL on
+               if (link->dc->hwss.edp_backlight_control)
+                       link->dc->hwss.edp_backlight_control(link, true);
+
+               // 3. Rx power on
+               dpcd_write_rx_power_ctrl(link, true);
+       } else {
+               // 3. Rx power off
+               dpcd_write_rx_power_ctrl(link, false);
+
+               // 2. panel BL off
+               if (link->dc->hwss.edp_backlight_control)
+                       link->dc->hwss.edp_backlight_control(link, false);
+
+               // 1. panel VDD off
+               if (!link->dc->config.edp_no_power_sequencing)
+                       link->dc->hwss.edp_power_control(link, false);
+       }
+}
+
 bool edp_wait_for_t12(struct dc_link *link)
 {
        if (link->connector_signal == SIGNAL_TYPE_EDP && link->dc->hwss.edp_wait_for_T12) {