drm/amd/powerplay: implement smc firmware v2.1 for smu11

[sfrench/cifs-2.6.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_ring.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index d7fae2676269478b66fb0fd45dfd450ed37de86f..4410c97ac9b7feff85e9671219c904576d1ff1f6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -29,8 +29,8 @@
 #include <drm/drm_print.h>
 
 /* max number of rings */
-#define AMDGPU_MAX_RINGS               23
-#define AMDGPU_MAX_GFX_RINGS           1
+#define AMDGPU_MAX_RINGS               24
+#define AMDGPU_MAX_GFX_RINGS           2
 #define AMDGPU_MAX_COMPUTE_RINGS       8
 #define AMDGPU_MAX_VCE_RINGS           3
 #define AMDGPU_MAX_UVD_ENC_RINGS       2
@@ -114,6 +114,7 @@ struct amdgpu_ring_funcs {
        uint32_t                align_mask;
        u32                     nop;
        bool                    support_64bit_ptrs;
+       bool                    no_user_fence;
        unsigned                vmhub;
        unsigned                extra_dw;
 
@@ -171,6 +172,7 @@ struct amdgpu_ring_funcs {
                              enum drm_sched_priority priority);
        /* Try to soft recover the ring to make the fence signal */
        void (*soft_recovery)(struct amdgpu_ring *ring, unsigned vmid);
+       int (*preempt_ib)(struct amdgpu_ring *ring);
 };
 
 struct amdgpu_ring {
@@ -205,6 +207,10 @@ struct amdgpu_ring {
        unsigned                fence_offs;
        uint64_t                current_ctx;
        char                    name[16];
+       u32                     trail_seq;
+       unsigned                trail_fence_offs;
+       u64                     trail_fence_gpu_addr;
+       volatile u32            *trail_fence_cpu_addr;
        unsigned                cond_exe_offs;
        u64                     cond_exe_gpu_addr;
        volatile u32            *cond_exe_cpu_addr;
@@ -245,6 +251,7 @@ struct amdgpu_ring {
 #define amdgpu_ring_pad_ib(r, ib) ((r)->funcs->pad_ib((r), (ib)))
 #define amdgpu_ring_init_cond_exec(r) (r)->funcs->init_cond_exec((r))
 #define amdgpu_ring_patch_cond_exec(r,o) (r)->funcs->patch_cond_exec((r),(o))
+#define amdgpu_ring_preempt_ib(r) (r)->funcs->preempt_ib(r)
 
 int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned ndw);
 void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count);
@@ -265,6 +272,12 @@ void amdgpu_ring_emit_reg_write_reg_wait_helper(struct amdgpu_ring *ring,
 bool amdgpu_ring_soft_recovery(struct amdgpu_ring *ring, unsigned int vmid,
                               struct dma_fence *fence);
 
+static inline void amdgpu_ring_set_preempt_cond_exec(struct amdgpu_ring *ring,
+                                                       bool cond_exec)
+{
+       *ring->cond_exe_cpu_addr = cond_exec;
+}
+
 static inline void amdgpu_ring_clear_ring(struct amdgpu_ring *ring)
 {
        int i = 0;