Merge branches 'edac-spr', 'edac-igen6' and 'edac-misc' into edac-updates-for-v5.11
[sfrench/cifs-2.6.git] / drivers / edac / amd64_edac.c
index 1362274d840b918067c49dad867444627f4bf9bc..15b0d39d284517e2b3de1400381424d4b41e5bc9 100644 (file)
@@ -18,6 +18,9 @@ static struct amd64_family_type *fam_type;
 /* Per-node stuff */
 static struct ecc_settings **ecc_stngs;
 
+/* Device for the PCI component */
+static struct device *pci_ctl_dev;
+
 /*
  * Valid scrub rates for the K8 hardware memory scrubber. We map the scrubbing
  * bandwidth to a valid bit pattern. The 'set' operation finds the 'matching-
@@ -2461,14 +2464,11 @@ static int map_err_sym_to_channel(int err_sym, int sym_size)
                case 0x20:
                case 0x21:
                        return 0;
-                       break;
                case 0x22:
                case 0x23:
                        return 1;
-                       break;
                default:
                        return err_sym >> 4;
-                       break;
                }
        /* x8 symbols */
        else
@@ -2478,17 +2478,12 @@ static int map_err_sym_to_channel(int err_sym, int sym_size)
                        WARN(1, KERN_ERR "Invalid error symbol: 0x%x\n",
                                          err_sym);
                        return -1;
-                       break;
-
                case 0x11:
                        return 0;
-                       break;
                case 0x12:
                        return 1;
-                       break;
                default:
                        return err_sym >> 3;
-                       break;
                }
        return -1;
 }
@@ -2683,6 +2678,9 @@ reserve_mc_sibling_devs(struct amd64_pvt *pvt, u16 pci_id1, u16 pci_id2)
                        return -ENODEV;
                }
 
+               if (!pci_ctl_dev)
+                       pci_ctl_dev = &pvt->F0->dev;
+
                edac_dbg(1, "F0: %s\n", pci_name(pvt->F0));
                edac_dbg(1, "F3: %s\n", pci_name(pvt->F3));
                edac_dbg(1, "F6: %s\n", pci_name(pvt->F6));
@@ -2707,6 +2705,9 @@ reserve_mc_sibling_devs(struct amd64_pvt *pvt, u16 pci_id1, u16 pci_id2)
                return -ENODEV;
        }
 
+       if (!pci_ctl_dev)
+               pci_ctl_dev = &pvt->F2->dev;
+
        edac_dbg(1, "F1: %s\n", pci_name(pvt->F1));
        edac_dbg(1, "F2: %s\n", pci_name(pvt->F2));
        edac_dbg(1, "F3: %s\n", pci_name(pvt->F3));
@@ -3623,21 +3624,10 @@ static void remove_one_instance(unsigned int nid)
 
 static void setup_pci_device(void)
 {
-       struct mem_ctl_info *mci;
-       struct amd64_pvt *pvt;
-
        if (pci_ctl)
                return;
 
-       mci = edac_mc_find(0);
-       if (!mci)
-               return;
-
-       pvt = mci->pvt_info;
-       if (pvt->umc)
-               pci_ctl = edac_pci_create_generic_ctl(&pvt->F0->dev, EDAC_MOD_STR);
-       else
-               pci_ctl = edac_pci_create_generic_ctl(&pvt->F2->dev, EDAC_MOD_STR);
+       pci_ctl = edac_pci_create_generic_ctl(pci_ctl_dev, EDAC_MOD_STR);
        if (!pci_ctl) {
                pr_warn("%s(): Unable to create PCI control\n", __func__);
                pr_warn("%s(): PCI error report via EDAC not set\n", __func__);
@@ -3716,6 +3706,8 @@ static int __init amd64_edac_init(void)
        return 0;
 
 err_pci:
+       pci_ctl_dev = NULL;
+
        msrs_free(msrs);
        msrs = NULL;
 
@@ -3745,6 +3737,8 @@ static void __exit amd64_edac_exit(void)
        kfree(ecc_stngs);
        ecc_stngs = NULL;
 
+       pci_ctl_dev = NULL;
+
        msrs_free(msrs);
        msrs = NULL;
 }