Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh64-2.6

[sfrench/cifs-2.6.git] / drivers / ata / pata_hpt37x.c

diff --git a/drivers/ata/pata_hpt37x.c b/drivers/ata/pata_hpt37x.c
index b0af65aadde3a9d48e84490bce15c89b9153f1fa..c5ddd937dbf21a438af2cbe8fb0f2c385b88a774 100644 (file)
--- a/drivers/ata/pata_hpt37x.c
+++ b/drivers/ata/pata_hpt37x.c
@@ -8,12 +8,10 @@
  * Copyright (C) 1999-2003             Andre Hedrick <andre@linux-ide.org>
  * Portions Copyright (C) 2001         Sun Microsystems, Inc.
  * Portions Copyright (C) 2003         Red Hat Inc
- * Portions Copyright (C) 2005-2006    MontaVista Software, Inc.
+ * Portions Copyright (C) 2005-2007    MontaVista Software, Inc.
  *
  * TODO
- *     PLL mode
- *     Look into engine reset on timeout errors. Should not be
- *             required.
+ *     Look into engine reset on timeout errors. Should not be required.
  */
 
 #include <linux/kernel.h>
@@ -26,7 +24,7 @@
 #include <linux/libata.h>
 
 #define DRV_NAME       "pata_hpt37x"
-#define DRV_VERSION    "0.6.6"
+#define DRV_VERSION    "0.6.9"
 
 struct hpt_clock {
        u8      xfer_speed;
@@ -1092,9 +1090,7 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
                int dpll, adjust;
 
                /* Compute DPLL */
-               dpll = 2;
-               if (port->udma_mask & 0xE0)
-                       dpll = 3;
+               dpll = (port->udma_mask & 0xC0) ? 3 : 2;
 
                f_low = (MHz[clock_slot] * 48) / MHz[dpll];
                f_high = f_low + 2;
@@ -1103,20 +1099,20 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 
                /* Select the DPLL clock. */
                pci_write_config_byte(dev, 0x5b, 0x21);
-               pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low);
+               pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100);
 
                for(adjust = 0; adjust < 8; adjust++) {
                        if (hpt37x_calibrate_dpll(dev))
                                break;
                        /* See if it'll settle at a fractionally different clock */
-                       if ((adjust & 3) == 3) {
-                               f_low --;
-                               f_high ++;
-                       }
-                       pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low);
+                       if (adjust & 1)
+                               f_low -= adjust >> 1;
+                       else
+                               f_high += adjust >> 1;
+                       pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100);
                }
                if (adjust == 8) {
-                       printk(KERN_WARNING "hpt37x: DPLL did not stabilize.\n");
+                       printk(KERN_ERR "pata_hpt37x: DPLL did not stabilize!\n");
                        return -ENODEV;
                }
                if (dpll == 3)
@@ -1124,7 +1120,8 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
                else
                        private_data = (void *)hpt37x_timings_50;
 
-               printk(KERN_INFO "hpt37x: Bus clock %dMHz, using DPLL.\n", MHz[dpll]);
+               printk(KERN_INFO "pata_hpt37x: bus clock %dMHz, using %dMHz DPLL.\n",
+                      MHz[clock_slot], MHz[dpll]);
        } else {
                private_data = (void *)chip_table->clocks[clock_slot];
                /*
@@ -1137,7 +1134,8 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
                        port = &info_hpt370_33;
                if (clock_slot < 2 && port == &info_hpt370a)
                        port = &info_hpt370a_33;
-               printk(KERN_INFO "hpt37x: %s: Bus clock %dMHz.\n", chip_table->name, MHz[clock_slot]);
+               printk(KERN_INFO "pata_hpt37x: %s using %dMHz bus clock.\n",
+                      chip_table->name, MHz[clock_slot]);
        }
 
        /* Now kick off ATA set up */