Merge tag 'v4.16-rc3' into x86/mm, to pick up fixes

[sfrench/cifs-2.6.git] / arch / x86 / Kconfig

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index c1236b187824e222a2c7fddd417272369767b06b..552b3d0eae36b6c7bc04d7b81325b7ec4803ab34 100644 (file)
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1471,6 +1471,8 @@ config X86_PAE
 
 config X86_5LEVEL
        bool "Enable 5-level page tables support"
+       select DYNAMIC_MEMORY_LAYOUT
+       select SPARSEMEM_VMEMMAP
        depends on X86_64
        ---help---
          5-level paging enables access to larger address space:
@@ -1479,8 +1481,8 @@ config X86_5LEVEL
 
          It will be supported by future Intel CPUs.
 
-         Note: a kernel with this option enabled can only be booted
-         on machines that support the feature.
+         A kernel with the option enabled can be booted on machines that
+         support 4- or 5-level paging.
 
          See Documentation/x86/x86_64/5level-paging.txt for more
          information.
@@ -2184,10 +2186,17 @@ config PHYSICAL_ALIGN
 
          Don't change this unless you know what you are doing.
 
+config DYNAMIC_MEMORY_LAYOUT
+       bool
+       ---help---
+         This option makes base addresses of vmalloc and vmemmap as well as
+         __PAGE_OFFSET movable during boot.
+
 config RANDOMIZE_MEMORY
        bool "Randomize the kernel memory sections"
        depends on X86_64
        depends on RANDOMIZE_BASE
+       select DYNAMIC_MEMORY_LAYOUT
        default RANDOMIZE_BASE
        ---help---
           Randomizes the base virtual address of kernel memory sections