riscv: implement Zicbom-based CMO instructions + the t-head variant

[sfrench/cifs-2.6.git] / arch / riscv / kernel / cpu.c

diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
index 0365557f712249bed323adcf8f507dd171c31d6a..76a2a225e3d995b5709baf83ee616840d0e0ecf1 100644 (file)
--- a/arch/riscv/kernel/cpu.c
+++ b/arch/riscv/kernel/cpu.c
@@ -14,37 +14,36 @@
  * Returns the hart ID of the given device tree node, or -ENODEV if the node
  * isn't an enabled and valid RISC-V hart node.
  */
-int riscv_of_processor_hartid(struct device_node *node)
+int riscv_of_processor_hartid(struct device_node *node, unsigned long *hart)
 {
        const char *isa;
-       u32 hart;
 
        if (!of_device_is_compatible(node, "riscv")) {
                pr_warn("Found incompatible CPU\n");
                return -ENODEV;
        }
 
-       hart = of_get_cpu_hwid(node, 0);
-       if (hart == ~0U) {
+       *hart = (unsigned long) of_get_cpu_hwid(node, 0);
+       if (*hart == ~0UL) {
                pr_warn("Found CPU without hart ID\n");
                return -ENODEV;
        }
 
        if (!of_device_is_available(node)) {
-               pr_info("CPU with hartid=%d is not available\n", hart);
+               pr_info("CPU with hartid=%lu is not available\n", *hart);
                return -ENODEV;
        }
 
        if (of_property_read_string(node, "riscv,isa", &isa)) {
-               pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n", hart);
+               pr_warn("CPU with hartid=%lu has no \"riscv,isa\" property\n", *hart);
                return -ENODEV;
        }
        if (isa[0] != 'r' || isa[1] != 'v') {
-               pr_warn("CPU with hartid=%d has an invalid ISA of \"%s\"\n", hart, isa);
+               pr_warn("CPU with hartid=%lu has an invalid ISA of \"%s\"\n", *hart, isa);
                return -ENODEV;
        }
 
-       return hart;
+       return 0;
 }
 
 /*
@@ -53,11 +52,16 @@ int riscv_of_processor_hartid(struct device_node *node)
  * To achieve this, we walk up the DT tree until we find an active
  * RISC-V core (HART) node and extract the cpuid from it.
  */
-int riscv_of_parent_hartid(struct device_node *node)
+int riscv_of_parent_hartid(struct device_node *node, unsigned long *hartid)
 {
+       int rc;
+
        for (; node; node = node->parent) {
-               if (of_device_is_compatible(node, "riscv"))
-                       return riscv_of_processor_hartid(node);
+               if (of_device_is_compatible(node, "riscv")) {
+                       rc = riscv_of_processor_hartid(node, hartid);
+                       if (!rc)
+                               return 0;
+               }
        }
 
        return -1;