Merge patch series "riscv, mm: detect svnapot cpu support at runtime"

[sfrench/cifs-2.6.git] / arch / riscv / include / asm / pgtable.h

diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 76502bc7bef2a79ccb4671e8251bea1bedf4d9b4..3303fc03d724d56f408b5b99c81564b0fa9b8d66 100644 (file)
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -452,7 +452,7 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
         * Relying on flush_tlb_fix_spurious_fault would suffice, but
         * the extra traps reduce performance.  So, eagerly SFENCE.VMA.
         */
-       flush_tlb_page(vma, address);
+       local_flush_tlb_page(address);
 }
 
 #define __HAVE_ARCH_UPDATE_MMU_TLB
@@ -758,19 +758,25 @@ static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
        page_table_check_pmd_set(vma->vm_mm, address, pmdp, pmd);
        return __pmd(atomic_long_xchg((atomic_long_t *)pmdp, pmd_val(pmd)));
 }
+
+#define pmdp_collapse_flush pmdp_collapse_flush
+extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
+                                unsigned long address, pmd_t *pmdp);
 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 
 /*
- * Encode and decode a swap entry
+ * Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that
+ * are !pte_none() && !pte_present().
  *
  * Format of swap PTE:
  *     bit            0:       _PAGE_PRESENT (zero)
  *     bit       1 to 3:       _PAGE_LEAF (zero)
  *     bit            5:       _PAGE_PROT_NONE (zero)
- *     bits      6 to 10:      swap type
- *     bits 10 to XLEN-1:      swap offset
+ *     bit            6:       exclusive marker
+ *     bits      7 to 11:      swap type
+ *     bits 11 to XLEN-1:      swap offset
  */
-#define __SWP_TYPE_SHIFT       6
+#define __SWP_TYPE_SHIFT       7
 #define __SWP_TYPE_BITS                5
 #define __SWP_TYPE_MASK                ((1UL << __SWP_TYPE_BITS) - 1)
 #define __SWP_OFFSET_SHIFT     (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
@@ -781,11 +787,27 @@ static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
 #define __swp_type(x)  (((x).val >> __SWP_TYPE_SHIFT) & __SWP_TYPE_MASK)
 #define __swp_offset(x)        ((x).val >> __SWP_OFFSET_SHIFT)
 #define __swp_entry(type, offset) ((swp_entry_t) \
-       { ((type) << __SWP_TYPE_SHIFT) | ((offset) << __SWP_OFFSET_SHIFT) })
+       { (((type) & __SWP_TYPE_MASK) << __SWP_TYPE_SHIFT) | \
+         ((offset) << __SWP_OFFSET_SHIFT) })
 
 #define __pte_to_swp_entry(pte)        ((swp_entry_t) { pte_val(pte) })
 #define __swp_entry_to_pte(x)  ((pte_t) { (x).val })
 
+static inline int pte_swp_exclusive(pte_t pte)
+{
+       return pte_val(pte) & _PAGE_SWP_EXCLUSIVE;
+}
+
+static inline pte_t pte_swp_mkexclusive(pte_t pte)
+{
+       return __pte(pte_val(pte) | _PAGE_SWP_EXCLUSIVE);
+}
+
+static inline pte_t pte_swp_clear_exclusive(pte_t pte)
+{
+       return __pte(pte_val(pte) & ~_PAGE_SWP_EXCLUSIVE);
+}
+
 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION
 #define __pmd_to_swp_entry(pmd) ((swp_entry_t) { pmd_val(pmd) })
 #define __swp_entry_to_pmd(swp) __pmd((swp).val)