Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6

[sfrench/cifs-2.6.git] / arch / mips / pci / pci-ip27.c

diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
index 80eb9af9ecdffb3c7ec0ab883903a6ac082f05aa..bb64828a92fece6bcab023b1fd50cbcaf814231e 100644 (file)
--- a/arch/mips/pci/pci-ip27.c
+++ b/arch/mips/pci/pci-ip27.c
@@ -16,8 +16,6 @@
 #include <asm/sn/intr.h>
 #include <asm/sn/sn0/hub.h>
 
-extern unsigned int allocate_irqno(void);
-
 /*
  * Max #PCI busses we can handle; ie, max #PCI bridges.
  */
@@ -42,7 +40,7 @@ int irq_to_slot[MAX_PCI_BUSSES * MAX_DEVICES_PER_PCIBUS];
 
 extern struct pci_ops bridge_pci_ops;
 
-int __init bridge_probe(nasid_t nasid, int widget_id, int masterwid)
+int __cpuinit bridge_probe(nasid_t nasid, int widget_id, int masterwid)
 {
        unsigned long offset = NODE_OFFSET(nasid);
        struct bridge_controller *bc;
@@ -136,7 +134,7 @@ int __init bridge_probe(nasid_t nasid, int widget_id, int masterwid)
  * A given PCI device, in general, should be able to intr any of the cpus
  * on any one of the hubs connected to its xbow.
  */
-int __devinit pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+int __devinit pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
        struct bridge_controller *bc = BRIDGE_CONTROLLER(dev->bus);
        int irq = bc->pci_int[slot];