Switch SiByte drivers back to __raw_*() functions.

[sfrench/cifs-2.6.git] / arch / mips / mm / pg-sb1.c

diff --git a/arch/mips/mm/pg-sb1.c b/arch/mips/mm/pg-sb1.c
index 59d131b5e536811917691bd12bf2b936c11a9f4c..7a90ea3838455c3d14a181af3af5303453f66cba 100644 (file)
--- a/arch/mips/mm/pg-sb1.c
+++ b/arch/mips/mm/pg-sb1.c
@@ -114,7 +114,7 @@ static inline void copy_page_cpu(void *to, void *from)
        "       pref    " SB1_PREF_STORE_STREAMED_HINT ",  -64(%1)\n"
        "       pref    " SB1_PREF_LOAD_STREAMED_HINT  ",  -32(%0)\n"
        "1:     pref    " SB1_PREF_STORE_STREAMED_HINT ",  -32(%1)\n"
-# ifdef CONFIG_MIPS64
+# ifdef CONFIG_64BIT
        "       ld      $8, -128(%0)    \n"  /* Block copy a cacheline */
        "       ld      $9, -120(%0)    \n"
        "       ld      $10, -112(%0)   \n"
@@ -148,7 +148,7 @@ static inline void copy_page_cpu(void *to, void *from)
        "       daddiu  %0, %0, -128    \n"
        "       daddiu  %1, %1, -128    \n"
 #endif
-#ifdef CONFIG_MIPS64
+#ifdef CONFIG_64BIT
        "       ld      $8, 0(%0)       \n"  /* Block copy a cacheline */
        "1:     ld      $9, 8(%0)       \n"
        "       ld      $10, 16(%0)     \n"
@@ -178,7 +178,7 @@ static inline void copy_page_cpu(void *to, void *from)
        "       daddiu  %0, %0, 32      \n"
        "       daddiu  %1, %1, 32      \n"
        "       bnel    %0, %2, 1b      \n"
-#ifdef CONFIG_MIPS64
+#ifdef CONFIG_64BIT
        "        ld     $8, 0(%0)       \n"
 #else
        "        lw     $2, 0(%0)       \n"
@@ -186,7 +186,7 @@ static inline void copy_page_cpu(void *to, void *from)
        "       .set    pop             \n"
        : "+r" (src), "+r" (dst)
        : "r" (end)
-#ifdef CONFIG_MIPS64
+#ifdef CONFIG_64BIT
        : "$8","$9","$10","$11","memory");
 #else
        : "$2","$3","$6","$7","$8","$9","$10","$11","memory");
@@ -198,7 +198,7 @@ static inline void copy_page_cpu(void *to, void *from)
 
 /*
  * Pad descriptors to cacheline, since each is exclusively owned by a
- * particular CPU. 
+ * particular CPU.
  */
 typedef struct dmadscr_s {
        u64 dscr_a;
@@ -214,12 +214,12 @@ void sb1_dma_init(void)
        int cpu = smp_processor_id();
        u64 base_val = CPHYSADDR(&page_descr[cpu]) | V_DM_DSCR_BASE_RINGSZ(1);
 
-       bus_writeq(base_val,
-                  (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
-       bus_writeq(base_val | M_DM_DSCR_BASE_RESET,
-                  (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
-       bus_writeq(base_val | M_DM_DSCR_BASE_ENABL,
-                  (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
+       __raw_writeq(base_val,
+                    IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
+       __raw_writeq(base_val | M_DM_DSCR_BASE_RESET,
+                    IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
+       __raw_writeq(base_val | M_DM_DSCR_BASE_ENABL,
+                    IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
 }
 
 void clear_page(void *page)
@@ -232,16 +232,16 @@ void clear_page(void *page)
 
        page_descr[cpu].dscr_a = CPHYSADDR(page) | M_DM_DSCRA_ZERO_MEM | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT;
        page_descr[cpu].dscr_b = V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE);
-       bus_writeq(1, (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT)));
+       __raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT)));
 
        /*
         * Don't really want to do it this way, but there's no
         * reliable way to delay completion detection.
         */
-       while (!(bus_readq((void *)(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)) &
-                          M_DM_DSCR_BASE_INTERRUPT))))
+       while (!(__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)))
+                M_DM_DSCR_BASE_INTERRUPT)))
                ;
-       bus_readq((void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
+       __raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
 }
 
 void copy_page(void *to, void *from)
@@ -257,16 +257,16 @@ void copy_page(void *to, void *from)
 
        page_descr[cpu].dscr_a = CPHYSADDR(to_phys) | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT;
        page_descr[cpu].dscr_b = CPHYSADDR(from_phys) | V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE);
-       bus_writeq(1, (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT)));
+       __raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT)));
 
        /*
         * Don't really want to do it this way, but there's no
         * reliable way to delay completion detection.
         */
-       while (!(bus_readq((void *)(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)) &
-                                   M_DM_DSCR_BASE_INTERRUPT))))
+       while (!(__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)) &
+                            M_DM_DSCR_BASE_INTERRUPT)))
                ;
-       bus_readq((void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
+       __raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
 }
 
 #else /* !CONFIG_SIBYTE_DMA_PAGEOPS */